%0 Conference Paper %1 conf/ispan/MeftaliDS05 %A Meftali, Samy %A Dekeyser, Jean-Luc %A Scherson, Isaac D. %B ISPAN %D 2005 %I IEEE Computer Society %K %P 352-357 %T Scalable Multistage Network for Multiprocessor System-on-Chip Design. %U http://dblp.uni-trier.de/db/conf/ispan/ispan2005.html#MeftaliDS05 %@ 0-7695-2509-1

@inproceedings{conf/ispan/MeftaliDS05, added-at = {2023-12-12T19:57:40.000+0100}, author = {Meftali, Samy and Dekeyser, Jean-Luc and Scherson, Isaac D.}, biburl = {https://www.bibsonomy.org/bibtex/2f0b8d9e14a6de0215e1c91aa6129fcaf/admin}, booktitle = {ISPAN}, crossref = {conf/ispan/2005}, ee = {http://doi.ieeecomputersociety.org/10.1109/ISPAN.2005.77}, interhash = {287776e9a0d5393828d09dd543482042}, intrahash = {f0b8d9e14a6de0215e1c91aa6129fcaf}, isbn = {0-7695-2509-1}, keywords = {}, pages = {352-357}, publisher = {IEEE Computer Society}, timestamp = {2023-12-12T19:57:40.000+0100}, title = {Scalable Multistage Network for Multiprocessor System-on-Chip Design.}, url = {http://dblp.uni-trier.de/db/conf/ispan/ispan2005.html#MeftaliDS05}, year = 2005 }