%0 Conference Paper %1 conf/vlsid/PomeranzR08 %A Pomeranz, Irith %A Reddy, Sudhakar M. %B VLSI Design %D 2008 %I IEEE Computer Society %K dblp %P 175-180 %T Design-for-Testability for Improved Path Delay Fault Coverage of Critical Paths. %U http://dblp.uni-trier.de/db/conf/vlsid/vlsid2008.html#PomeranzR08 %@ 0-7695-3083-4

@inproceedings{conf/vlsid/PomeranzR08, added-at = {2023-03-24T00:00:00.000+0100}, author = {Pomeranz, Irith and Reddy, Sudhakar M.}, biburl = {https://www.bibsonomy.org/bibtex/28cf41e54ea2f8a0c1eb0bb24b6ae19c7/dblp}, booktitle = {VLSI Design}, crossref = {conf/vlsid/2008}, ee = {https://doi.ieeecomputersociety.org/10.1109/VLSI.2008.22}, interhash = {7cdd53aaca236d1fa7276efc88e47b60}, intrahash = {8cf41e54ea2f8a0c1eb0bb24b6ae19c7}, isbn = {0-7695-3083-4}, keywords = {dblp}, pages = {175-180}, publisher = {IEEE Computer Society}, timestamp = {2024-04-10T04:19:22.000+0200}, title = {Design-for-Testability for Improved Path Delay Fault Coverage of Critical Paths.}, url = {http://dblp.uni-trier.de/db/conf/vlsid/vlsid2008.html#PomeranzR08}, year = 2008 }