%0 Conference Paper %1 conf/vlsid/SrinivasanMEK09 %A Srinivasan, Suresh %A Mathew, Sanu %A Erraguntla, Vasantha %A Krishnamurthy, Ram %B VLSI Design %D 2009 %I IEEE Computer Society %K dblp %P 301-306 %T A 4Gbps 0.57pJ/bit Process-Voltage-Temperature Variation Tolerant All-Digital True Random Number Generator in 45nm CMOS. %U http://dblp.uni-trier.de/db/conf/vlsid/vlsid2009.html#SrinivasanMEK09 %@ 978-0-7695-3506-7

@inproceedings{conf/vlsid/SrinivasanMEK09, added-at = {2023-03-24T00:00:00.000+0100}, author = {Srinivasan, Suresh and Mathew, Sanu and Erraguntla, Vasantha and Krishnamurthy, Ram}, biburl = {https://www.bibsonomy.org/bibtex/28e5ff057bd536f93292d83f914a8362f/dblp}, booktitle = {VLSI Design}, crossref = {conf/vlsid/2009}, ee = {https://doi.ieeecomputersociety.org/10.1109/VLSI.Design.2009.69}, interhash = {264ba0825ae745a89cca8100ad420667}, intrahash = {8e5ff057bd536f93292d83f914a8362f}, isbn = {978-0-7695-3506-7}, keywords = {dblp}, pages = {301-306}, publisher = {IEEE Computer Society}, timestamp = {2024-04-10T04:19:34.000+0200}, title = {A 4Gbps 0.57pJ/bit Process-Voltage-Temperature Variation Tolerant All-Digital True Random Number Generator in 45nm CMOS.}, url = {http://dblp.uni-trier.de/db/conf/vlsid/vlsid2009.html#SrinivasanMEK09}, year = 2009 }