%0 Journal Article %1 journals/corr/HaquePJP15 %A Haque, Mohammad Shihabul %A Peddersen, Jorgen %A Janapsatya, Andhi %A Parameswaran, Sri %D 2015 %J CoRR %K dblp %T DEW: A Fast Level 1 Cache Simulation Approach for Embedded Processors with FIFO Replacement Policy. %U http://dblp.uni-trier.de/db/journals/corr/corr1506.html#HaquePJP15 %V abs/1506.03181

@article{journals/corr/HaquePJP15, added-at = {2018-08-13T00:00:00.000+0200}, author = {Haque, Mohammad Shihabul and Peddersen, Jorgen and Janapsatya, Andhi and Parameswaran, Sri}, biburl = {https://www.bibsonomy.org/bibtex/2c9a924f5c9e1326395ce4c28739c4d55/dblp}, ee = {http://arxiv.org/abs/1506.03181}, interhash = {3dbfaff16be51693fc3715cd5a6e6748}, intrahash = {c9a924f5c9e1326395ce4c28739c4d55}, journal = {CoRR}, keywords = {dblp}, timestamp = {2018-08-14T15:04:22.000+0200}, title = {DEW: A Fast Level 1 Cache Simulation Approach for Embedded Processors with FIFO Replacement Policy.}, url = {http://dblp.uni-trier.de/db/journals/corr/corr1506.html#HaquePJP15}, volume = {abs/1506.03181}, year = 2015 }