%0 Conference Paper %1 conf/iscas/KuoSL94 %A Kuo, James B. %A Su, K. W. %A Lou, J. H. %B ISCAS %D 1994 %I IEEE %K dblp %P 323-326 %T A BiCMOS Dynamic Multiplier Using Wallace Tree Reduction Architecture and 1.5V Full-Swing BiCMOS Dynamic Logic Circuit. %U http://dblp.uni-trier.de/db/conf/iscas/iscas1994-4.html#KuoSL94 %@ 0-7803-1916-8

@inproceedings{conf/iscas/KuoSL94, added-at = {2016-05-23T00:00:00.000+0200}, author = {Kuo, James B. and Su, K. W. and Lou, J. H.}, biburl = {https://www.bibsonomy.org/bibtex/2d78e3ac309cf634ca9bf7a1763f966b2/dblp}, booktitle = {ISCAS}, crossref = {conf/iscas/1994}, ee = {http://dx.doi.org/10.1109/ISCAS.1994.409262}, interhash = {68198f0b5e9c15d706d1c6fa9c208cdc}, intrahash = {d78e3ac309cf634ca9bf7a1763f966b2}, isbn = {0-7803-1916-8}, keywords = {dblp}, pages = {323-326}, publisher = {IEEE}, timestamp = {2016-05-24T11:51:44.000+0200}, title = {A BiCMOS Dynamic Multiplier Using Wallace Tree Reduction Architecture and 1.5V Full-Swing BiCMOS Dynamic Logic Circuit.}, url = {http://dblp.uni-trier.de/db/conf/iscas/iscas1994-4.html#KuoSL94}, year = 1994 }