@inproceedings{conf/ats/BonhommeGGLP01,
title = {A Gated Clock Scheme for Low Power Scan Testing of Logic ICs or Embedded Cores.},
author = {Yannick Bonhomme and Patrick Girard and Loïs Guiller and Christian Landrault and Serge Pravossoudovitch},
booktitle = {Asian Test Symposium},
crossref = {conf/ats/2001},
pages = {253-258},
publisher = {IEEE Computer Society},
url = {http://dblp.uni-trier.de/db/conf/ats/ats2001.html#BonhommeGGLP01},
year = {2001},
description = {dblp},
ee = {http://csdl.computer.org/comp/proceedings/ats/2001/1378/00/13780253abs.htm}, isbn = {0-7695-1378-6}, date = {2007-07-27},
keywords = {dblp }
}