%0 Conference Paper %1 conf/vlsid/SachanABMMGB13 %A Sachan, Rashmi %A Ali, Shahid %A Bist, Chandan %A Misra, Sunil %A Menezes, Vinod %A Gupta, Sharad %A Bosshart, Pat %B VLSI Design %D 2013 %I IEEE Computer Society %K dblp %P 55-59 %T A 40nm 650Mhz 0.5fJ/Bit/Search TCAM Compiler Using Complementary Bit-cell Architecture. %U http://dblp.uni-trier.de/db/conf/vlsid/vlsid2013.html#SachanABMMGB13 %@ 978-1-4673-4639-9

@inproceedings{conf/vlsid/SachanABMMGB13, added-at = {2023-03-24T00:00:00.000+0100}, author = {Sachan, Rashmi and Ali, Shahid and Bist, Chandan and Misra, Sunil and Menezes, Vinod and Gupta, Sharad and Bosshart, Pat}, biburl = {https://www.bibsonomy.org/bibtex/2e3a63fd885e4963353033a61e955cde1/dblp}, booktitle = {VLSI Design}, crossref = {conf/vlsid/2013}, ee = {https://doi.ieeecomputersociety.org/10.1109/VLSID.2013.162}, interhash = {4834af8bb99dc8e184f104db992fad6a}, intrahash = {e3a63fd885e4963353033a61e955cde1}, isbn = {978-1-4673-4639-9}, keywords = {dblp}, pages = {55-59}, publisher = {IEEE Computer Society}, timestamp = {2024-04-10T04:08:28.000+0200}, title = {A 40nm 650Mhz 0.5fJ/Bit/Search TCAM Compiler Using Complementary Bit-cell Architecture.}, url = {http://dblp.uni-trier.de/db/conf/vlsid/vlsid2013.html#SachanABMMGB13}, year = 2013 }