%0 Journal Article %1 journals/asc/BenrejebS17 %A Ameur, Mohamed Sadok Ben %A Sakly, Anis %D 2017 %J Appl. Soft Comput. %K dblp %P 378-387 %T FPGA based hardware implementation of Bat Algorithm. %U http://dblp.uni-trier.de/db/journals/asc/asc58.html#BenrejebS17 %V 58

@article{journals/asc/BenrejebS17, added-at = {2017-08-28T00:00:00.000+0200}, author = {Ameur, Mohamed Sadok Ben and Sakly, Anis}, biburl = {https://www.bibsonomy.org/bibtex/2f66df04e101713a9f9bbf2780f206a6a/dblp}, ee = {https://doi.org/10.1016/j.asoc.2017.04.015}, interhash = {36714793bb08229d7b2623b5f3fe7757}, intrahash = {f66df04e101713a9f9bbf2780f206a6a}, journal = {Appl. Soft Comput.}, keywords = {dblp}, pages = {378-387}, timestamp = {2017-08-29T11:47:13.000+0200}, title = {FPGA based hardware implementation of Bat Algorithm.}, url = {http://dblp.uni-trier.de/db/journals/asc/asc58.html#BenrejebS17}, volume = 58, year = 2017 }