%0 Conference Paper %1 conf/iccad/ChoXRZP13 %A Cho, Minsik %A Xiang, Hua %A Ren, Haoxing %A Ziegler, Matthew M. %A Puri, Ruchir %B ICCAD %D 2013 %E Henkel, Jörg %I IEEE %K dblp %P 342-348 %T LatchPlanner: latch placement algorithm for datapath-oriented high-performance VLSI designs. %U http://dblp.uni-trier.de/db/conf/iccad/iccad2013.html#ChoXRZP13 %@ 978-1-4799-1069-4

@inproceedings{conf/iccad/ChoXRZP13, added-at = {2018-02-27T00:00:00.000+0100}, author = {Cho, Minsik and Xiang, Hua and Ren, Haoxing and Ziegler, Matthew M. and Puri, Ruchir}, biburl = {https://www.bibsonomy.org/bibtex/2a881ec9f00a2326e802c71e1c0c72d58/dblp}, booktitle = {ICCAD}, crossref = {conf/iccad/2013}, editor = {Henkel, Jörg}, ee = {http://dl.acm.org/citation.cfm?id=2561898}, interhash = {46d36c3e3cd11fbc26a5fbe9724440d0}, intrahash = {a881ec9f00a2326e802c71e1c0c72d58}, isbn = {978-1-4799-1069-4}, keywords = {dblp}, pages = {342-348}, publisher = {IEEE}, timestamp = {2019-10-17T22:45:18.000+0200}, title = {LatchPlanner: latch placement algorithm for datapath-oriented high-performance VLSI designs.}, url = {http://dblp.uni-trier.de/db/conf/iccad/iccad2013.html#ChoXRZP13}, year = 2013 }