%0 Conference Paper %1 conf/fpga/FraisseJGK16 %A Fraisse, Henri %A Joshi, Abhishek %A Gaitonde, Dinesh %A Kaviani, Alireza %B FPGA %D 2016 %E Chen, Deming %E Greene, Jonathan W. %I ACM %K dblp %P 74-79 %T Boolean Satisfiability-Based Routing and Its Application to Xilinx UltraScale Clock Network. %U http://dblp.uni-trier.de/db/conf/fpga/fpga2016.html#FraisseJGK16 %@ 978-1-4503-3856-1

@inproceedings{conf/fpga/FraisseJGK16, added-at = {2018-11-06T00:00:00.000+0100}, author = {Fraisse, Henri and Joshi, Abhishek and Gaitonde, Dinesh and Kaviani, Alireza}, biburl = {https://www.bibsonomy.org/bibtex/2b76a98a4aaf214e18d213d512183c5ce/dblp}, booktitle = {FPGA}, crossref = {conf/fpga/2016}, editor = {Chen, Deming and Greene, Jonathan W.}, ee = {https://doi.org/10.1145/2847263.2847342}, interhash = {4bf29593cb4b3f60043a11d68e803a9a}, intrahash = {b76a98a4aaf214e18d213d512183c5ce}, isbn = {978-1-4503-3856-1}, keywords = {dblp}, pages = {74-79}, publisher = {ACM}, timestamp = {2018-11-07T12:47:21.000+0100}, title = {Boolean Satisfiability-Based Routing and Its Application to Xilinx UltraScale Clock Network.}, url = {http://dblp.uni-trier.de/db/conf/fpga/fpga2016.html#FraisseJGK16}, year = 2016 }