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%0 Conference Paper
%1 conf/date/SchliebuschCLAMSBN04
%A Schliebusch, Oliver
%A Chattopadhyay, Anupam
%A Leupers, Rainer
%A Ascheid, Gerd
%A Meyr, Heinrich
%A Steinert, Mario
%A Braun, Gunnar
%A Nohl, Achim
%B DATE
%D 2004
%I IEEE Computer Society
%K dblp
%P 156-160
%T RTL Processor Synthesis for Architecture Exploration and Implementation.
%U http://dblp.uni-trier.de/db/conf/date/date2004-df.html#SchliebuschCLAMSBN04
%@ 0-7695-2085-5
@inproceedings{conf/date/SchliebuschCLAMSBN04,
added-at = {2023-03-24T00:00:00.000+0100},
author = {Schliebusch, Oliver and Chattopadhyay, Anupam and Leupers, Rainer and Ascheid, Gerd and Meyr, Heinrich and Steinert, Mario and Braun, Gunnar and Nohl, Achim},
biburl = {https://www.bibsonomy.org/bibtex/2e75fb07b43d342cec481224dfe0180e5/dblp},
booktitle = {DATE},
crossref = {conf/date/2004},
ee = {http://dl.acm.org/citation.cfm?id=969231},
interhash = {63528bdcd9aa8a021a877b0c730eee08},
intrahash = {e75fb07b43d342cec481224dfe0180e5},
isbn = {0-7695-2085-5},
keywords = {dblp},
pages = {156-160},
publisher = {IEEE Computer Society},
timestamp = {2024-04-10T06:51:35.000+0200},
title = {RTL Processor Synthesis for Architecture Exploration and Implementation.},
url = {http://dblp.uni-trier.de/db/conf/date/date2004-df.html#SchliebuschCLAMSBN04},
year = 2004
}