%0 Journal Article %1 journals/ton/PapadogiannakiK17 %A Papadogiannaki, Eva %A Koromilas, Lazaros %A Vasiliadis, Giorgos %A Ioannidis, Sotiris %D 2017 %J IEEE/ACM Trans. Netw. %K dblp %N 3 %P 1593-1606 %T Efficient Software Packet Processing on Heterogeneous and Asymmetric Hardware Architectures. %U http://dblp.uni-trier.de/db/journals/ton/ton25.html#PapadogiannakiK17 %V 25

@article{journals/ton/PapadogiannakiK17, added-at = {2017-06-19T00:00:00.000+0200}, author = {Papadogiannaki, Eva and Koromilas, Lazaros and Vasiliadis, Giorgos and Ioannidis, Sotiris}, biburl = {https://www.bibsonomy.org/bibtex/2b860d3c032ea7a0c43b6b50572d765c4/dblp}, ee = {http://doi.ieeecomputersociety.org/10.1109/TNET.2016.2642338}, interhash = {732ce2c294dd5c3cfbc978ba08bd99a6}, intrahash = {b860d3c032ea7a0c43b6b50572d765c4}, journal = {IEEE/ACM Trans. Netw.}, keywords = {dblp}, number = 3, pages = {1593-1606}, timestamp = {2017-06-20T11:37:21.000+0200}, title = {Efficient Software Packet Processing on Heterogeneous and Asymmetric Hardware Architectures.}, url = {http://dblp.uni-trier.de/db/journals/ton/ton25.html#PapadogiannakiK17}, volume = 25, year = 2017 }