%0 Journal Article %1 journals/tc/Maurer67 %A Maurer, Harold E. %D 1967 %J IEEE Trans. Electronic Computers %K dblp %N 4 %P 519-522 %T A Design Procedure for Radiation Hardening Certain NOR Gate Logic Circuits. %U http://dblp.uni-trier.de/db/journals/tc/tc16.html#Maurer67 %V 16

@article{journals/tc/Maurer67, added-at = {2016-05-08T00:00:00.000+0200}, author = {Maurer, Harold E.}, biburl = {https://www.bibsonomy.org/bibtex/2f6d5702b381f2bf91d8f9eea7894150d/dblp}, ee = {http://dx.doi.org/10.1109/PGEC.1967.264684}, interhash = {8a5861bd0a84fe071534d82e807bba1a}, intrahash = {f6d5702b381f2bf91d8f9eea7894150d}, journal = {IEEE Trans. Electronic Computers}, keywords = {dblp}, number = 4, pages = {519-522}, timestamp = {2016-05-10T11:36:17.000+0200}, title = {A Design Procedure for Radiation Hardening Certain NOR Gate Logic Circuits.}, url = {http://dblp.uni-trier.de/db/journals/tc/tc16.html#Maurer67}, volume = 16, year = 1967 }