%0 Conference Paper %1 conf/glvlsi/ZiesemerZRMAC14 %A Ziesemer, Adriel %A Reis, Ricardo %A Moreira, Matheus T. %A Arendt, Michel Evandro %A Calazans, Ney Laert Vilar %B ACM Great Lakes Symposium on VLSI %D 2014 %E Cavallaro, Joseph R. %E Zhang, Tong %E Jones, Alex K. %E Li, Hai (Helen) %I ACM %K dblp %P 245-246 %T A design flow for physical synthesis of digital cells with ASTRAN. %U http://dblp.uni-trier.de/db/conf/glvlsi/glvlsi2014.html#ZiesemerZRMAC14 %@ 978-1-4503-2816-6

@inproceedings{conf/glvlsi/ZiesemerZRMAC14, added-at = {2022-10-02T00:00:00.000+0200}, author = {Ziesemer, Adriel and Reis, Ricardo and Moreira, Matheus T. and Arendt, Michel Evandro and Calazans, Ney Laert Vilar}, biburl = {https://www.bibsonomy.org/bibtex/2f1dff965210d63074eecaa06f003a516/dblp}, booktitle = {ACM Great Lakes Symposium on VLSI}, crossref = {conf/glvlsi/2014}, editor = {Cavallaro, Joseph R. and Zhang, Tong and Jones, Alex K. and Li, Hai (Helen)}, ee = {https://doi.org/10.1145/2591513.2591577}, interhash = {8c7778ca46b505638d92f81349670365}, intrahash = {f1dff965210d63074eecaa06f003a516}, isbn = {978-1-4503-2816-6}, keywords = {dblp}, pages = {245-246}, publisher = {ACM}, timestamp = {2024-04-10T14:31:04.000+0200}, title = {A design flow for physical synthesis of digital cells with ASTRAN.}, url = {http://dblp.uni-trier.de/db/conf/glvlsi/glvlsi2014.html#ZiesemerZRMAC14}, year = 2014 }