%0 Conference Paper %1 conf/vlsid/SenGGC04 %A Sen, Padmanava %A Garg, Vipul %A Garg, Ramesh %A Chakrabarti, Nirmal B. %B VLSI Design %D 2004 %I IEEE Computer Society %K dblp %P 410-415 %T Design of Power Amplifiers at 2.4 GHz/900 MHz and Implementation of On-chip Linearization Technique in 0.18/0.25µm CMOS. %U http://dblp.uni-trier.de/db/conf/vlsid/vlsid2004.html#SenGGC04 %@ 0-7695-2072-3

@inproceedings{conf/vlsid/SenGGC04, added-at = {2023-03-24T00:00:00.000+0100}, author = {Sen, Padmanava and Garg, Vipul and Garg, Ramesh and Chakrabarti, Nirmal B.}, biburl = {https://www.bibsonomy.org/bibtex/2113c121ff7382925103b552cc54ae5b9/dblp}, booktitle = {VLSI Design}, crossref = {conf/vlsid/2004}, ee = {https://doi.ieeecomputersociety.org/10.1109/ICVD.2004.1260957}, interhash = {8fc1ac5648feff8f4815736003f951d8}, intrahash = {113c121ff7382925103b552cc54ae5b9}, isbn = {0-7695-2072-3}, keywords = {dblp}, pages = {410-415}, publisher = {IEEE Computer Society}, timestamp = {2024-04-10T04:18:22.000+0200}, title = {Design of Power Amplifiers at 2.4 GHz/900 MHz and Implementation of On-chip Linearization Technique in 0.18/0.25µm CMOS.}, url = {http://dblp.uni-trier.de/db/conf/vlsid/vlsid2004.html#SenGGC04}, year = 2004 }