%0 Conference Paper %1 conf/vlsi/WilleFGGED07 %A Wille, Robert %A Fey, Görschwin %A Große, Daniel %A Eggersglüß, Stephan %A Drechsler, Rolf %B VLSI-SoC (Selected Papers) %D 2007 %I Springer %K %P 1-17 %T SWORD: A SAT like Prover Using Word Level Information. %U http://dblp.uni-trier.de/db/conf/vlsi/vlsisoc2007s.html#WilleFGGED07 %V 291 %@ 978-0-387-93845-5

@inproceedings{conf/vlsi/WilleFGGED07, added-at = {2023-12-13T04:36:32.000+0100}, author = {Wille, Robert and Fey, Görschwin and Große, Daniel and Eggersglüß, Stephan and Drechsler, Rolf}, biburl = {https://www.bibsonomy.org/bibtex/25acdbd3de2db18f6f887d8991fddd02e/admin}, booktitle = {VLSI-SoC (Selected Papers)}, crossref = {conf/vlsi/2007socs}, ee = {https://www.wikidata.org/entity/Q59242691}, interhash = {980bed06ceb40b02e87b308d219559de}, intrahash = {5acdbd3de2db18f6f887d8991fddd02e}, isbn = {978-0-387-93845-5}, keywords = {}, pages = {1-17}, publisher = {Springer}, series = {IFIP}, timestamp = {2023-12-13T04:36:32.000+0100}, title = {SWORD: A SAT like Prover Using Word Level Information.}, url = {http://dblp.uni-trier.de/db/conf/vlsi/vlsisoc2007s.html#WilleFGGED07}, volume = 291, year = 2007 }