%0 Journal Article %1 journals/tvlsi/ConteMST00 %A Conte, Thomas M. %A Menezes, Kishore N. %A Sathaye, Sumedh W. %A Toburen, Mark C. %D 2000 %J IEEE Trans. Very Large Scale Integr. Syst. %K dblp %N 2 %P 129-137 %T System-level power consumption modeling and tradeoff analysis techniques for superscalar processor design. %U http://dblp.uni-trier.de/db/journals/tvlsi/tvlsi8.html#ConteMST00 %V 8

@article{journals/tvlsi/ConteMST00, added-at = {2020-03-11T00:00:00.000+0100}, author = {Conte, Thomas M. and Menezes, Kishore N. and Sathaye, Sumedh W. and Toburen, Mark C.}, biburl = {https://www.bibsonomy.org/bibtex/29f721dd11c02db3c0d1e50b7cd648bda/dblp}, ee = {https://doi.org/10.1109/92.831433}, interhash = {a30ce6d13f2ebffde2366e14caacec26}, intrahash = {9f721dd11c02db3c0d1e50b7cd648bda}, journal = {IEEE Trans. Very Large Scale Integr. Syst.}, keywords = {dblp}, number = 2, pages = {129-137}, timestamp = {2020-03-12T11:41:03.000+0100}, title = {System-level power consumption modeling and tradeoff analysis techniques for superscalar processor design.}, url = {http://dblp.uni-trier.de/db/journals/tvlsi/tvlsi8.html#ConteMST00}, volume = 8, year = 2000 }