Inproceedings,
A 25W SoC with Dual 2GHz Power Cores and Integrated Memory and I/O Subsystems.
Z. Chen, P. Ananthanarayanan, S. Biswas, B. Campbell, H. Chen, S. Desai, D. Go, R. Goel, V. von Kaenel, J. Kassoff, F. Klass, W. Ku, T. Li, J. Lin, K. Malik, A. Mehta, D. Murray, E. Shiu, C. Shuler, S. Santhanam, G. Scott, J. Sugisawa, T. Takayanagi, H. Tarn, P. Trivedi, J. Wang, R. Wen, and J. Yong.ISSCC, page 104-105. IEEE, (2007)
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- conf/isscc/ChenABCCDGGKKKKLLMMMSSSSSTTTWWY07
- entry type
- inproceedings
- booktitle
- ISSCC
- year
- 2007
- pages
- 104-105
- publisher
- IEEE
- crossref
- conf/isscc/2007
- ee
- http://dx.doi.org/10.1109/ISSCC.2007.373609
- isbn
- 1-4244-0853-9
- url
- http://dblp.uni-trier.de/db/conf/isscc/isscc2007.html#ChenABCCDGGKKKKLLMMMSSSSSTTTWWY07
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%1 conf/isscc/ChenABCCDGGKKKKLLMMMSSSSSTTTWWY07
%A Chen, Zongjian
%A Ananthanarayanan, Priya
%A Biswas, Sukalp
%A Campbell, Brian
%A Chen, Hao
%A Desai, Shaishav
%A Go, Dominic
%A Goel, Rajat
%A von Kaenel, Vincent
%A Kassoff, Jason
%A Klass, Fabian
%A Ku, Weichun
%A Li, Tony
%A Lin, Jonathon
%A Malik, Khurram
%A Mehta, Anup
%A Murray, Daniel
%A Shiu, Eric
%A Shuler, Chris
%A Santhanam, Sribalan
%A Scott, Greg
%A Sugisawa, Junji
%A Takayanagi, Toshinari
%A Tarn, Honkai John
%A Trivedi, Pradeep
%A Wang, James
%A Wen, Ricky
%A Yong, John
%B ISSCC
%D 2007
%I IEEE
%K dblp
%P 104-105
%T A 25W SoC with Dual 2GHz Power Cores and Integrated Memory and I/O Subsystems.
%U http://dblp.uni-trier.de/db/conf/isscc/isscc2007.html#ChenABCCDGGKKKKLLMMMSSSSSTTTWWY07
%@ 1-4244-0853-9
@inproceedings{conf/isscc/ChenABCCDGGKKKKLLMMMSSSSSTTTWWY07,
added-at = {2016-05-24T00:00:00.000+0200},
author = {Chen, Zongjian and Ananthanarayanan, Priya and Biswas, Sukalp and Campbell, Brian and Chen, Hao and Desai, Shaishav and Go, Dominic and Goel, Rajat and von Kaenel, Vincent and Kassoff, Jason and Klass, Fabian and Ku, Weichun and Li, Tony and Lin, Jonathon and Malik, Khurram and Mehta, Anup and Murray, Daniel and Shiu, Eric and Shuler, Chris and Santhanam, Sribalan and Scott, Greg and Sugisawa, Junji and Takayanagi, Toshinari and Tarn, Honkai John and Trivedi, Pradeep and Wang, James and Wen, Ricky and Yong, John},
biburl = {https://www.bibsonomy.org/bibtex/2bc8f5ca56ed50a24a711845d6d9d8b54/dblp},
booktitle = {ISSCC},
crossref = {conf/isscc/2007},
ee = {http://dx.doi.org/10.1109/ISSCC.2007.373609},
interhash = {a7a1494d473327daea13ee0e6dd75715},
intrahash = {bc8f5ca56ed50a24a711845d6d9d8b54},
isbn = {1-4244-0853-9},
keywords = {dblp},
pages = {104-105},
publisher = {IEEE},
timestamp = {2016-05-25T11:41:52.000+0200},
title = {A 25W SoC with Dual 2GHz Power Cores and Integrated Memory and I/O Subsystems.},
url = {http://dblp.uni-trier.de/db/conf/isscc/isscc2007.html#ChenABCCDGGKKKKLLMMMSSSSSTTTWWY07},
year = 2007
}