%0 Conference Paper %1 7363663 %A Pfefferkorn, D. %A Schmider, A. %A Payá-Vayá, G %A Neuenhahn, M. %A Blume, H. %B Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS), 2015 International Conference on %D 2015 %K 2015 FPGA NoC myown %P 86-95 %R 10.1109/SAMOS.2015.7363663 %T FNOCEE: A framework for NoC evaluation by FPGA-based emulation %U http://ieeexplore.ieee.org/xpls/abs_all.jsp?arnumber=7363663 %X This paper introduces FNOCEE, a framework for the evaluation of NoC-based many-cores systems by FPGA-based emulation. It uses a task graph-oriented approach to model applications, while a hardware-accelerated genetic algorithm is employed to find close-to-optimal solutions to the task mapping problem. The proposed genetic algorithm is analyzed in detail, e.g., in terms of mutation rate and number of elite individuals. In order to illustrate the framework's capabilities, several case studies have been performed, wherein scalability of relevant parallel applications is investigated with regard to the number and type of available processing cores and the generated traffic load as a result of inter-task communication.

@inproceedings{7363663, abstract = {This paper introduces FNOCEE, a framework for the evaluation of NoC-based many-cores systems by FPGA-based emulation. It uses a task graph-oriented approach to model applications, while a hardware-accelerated genetic algorithm is employed to find close-to-optimal solutions to the task mapping problem. The proposed genetic algorithm is analyzed in detail, e.g., in terms of mutation rate and number of elite individuals. In order to illustrate the framework's capabilities, several case studies have been performed, wherein scalability of relevant parallel applications is investigated with regard to the number and type of available processing cores and the generated traffic load as a result of inter-task communication.}, added-at = {2016-04-20T13:12:23.000+0200}, author = {Pfefferkorn, D. and Schmider, A. and Payá-Vayá, G and Neuenhahn, M. and Blume, H.}, biburl = {https://www.bibsonomy.org/bibtex/22dc7d988f4902e3137bfd9931db441d9/imsl3s}, booktitle = {Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS), 2015 International Conference on}, description = {IEEE Xplore Abstract - FNOCEE: A framework for NoC evaluation by FPGA-based emulation}, doi = {10.1109/SAMOS.2015.7363663}, interhash = {a8039484d64ee5daefb70cafce4df90b}, intrahash = {2dc7d988f4902e3137bfd9931db441d9}, keywords = {2015 FPGA NoC myown}, month = {July}, pages = {86-95}, timestamp = {2016-04-20T13:20:03.000+0200}, title = {FNOCEE: A framework for NoC evaluation by FPGA-based emulation}, url = {http://ieeexplore.ieee.org/xpls/abs_all.jsp?arnumber=7363663}, year = 2015 }