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%0 Conference Paper
%1 conf/date/VignonCDMF09
%A Vignon, Anselme
%A Cosemans, Stefan
%A Dehaene, Wim
%A Marchal, Pol
%A Facchini, Marco
%B DATE
%D 2009
%E Benini, Luca
%E Micheli, Giovanni De
%E Al-Hashimi, Bashir M.
%E Müller, Wolfgang
%I IEEE
%K
%P 929-933
%T A novel DRAM architecture as a low leakage alternative for SRAM caches in a 3D interconnect context.
%U http://dblp.uni-trier.de/db/conf/date/date2009.html#VignonCDMF09
%@ 978-1-4244-3781-8
@inproceedings{conf/date/VignonCDMF09,
added-at = {2023-12-13T07:26:38.000+0100},
author = {Vignon, Anselme and Cosemans, Stefan and Dehaene, Wim and Marchal, Pol and Facchini, Marco},
biburl = {https://www.bibsonomy.org/bibtex/2154ef00569f2f1120a6e53c3c32880cf/admin},
booktitle = {DATE},
crossref = {conf/date/2009},
editor = {Benini, Luca and Micheli, Giovanni De and Al-Hashimi, Bashir M. and Müller, Wolfgang},
ee = {http://dl.acm.org/citation.cfm?id=1874848},
interhash = {b90af320755af67dd39f97d57f8bff35},
intrahash = {154ef00569f2f1120a6e53c3c32880cf},
isbn = {978-1-4244-3781-8},
keywords = {},
pages = {929-933},
publisher = {IEEE},
timestamp = {2023-12-13T07:26:38.000+0100},
title = {A novel DRAM architecture as a low leakage alternative for SRAM caches in a 3D interconnect context.},
url = {http://dblp.uni-trier.de/db/conf/date/date2009.html#VignonCDMF09},
year = 2009
}