%0 Conference Paper %1 conf/icecsys/NasalskiMGVA08 %A Nasalski, Piotr %A Makosiej, Adam %A Giraud, Bastien %A Vladimirescu, Andrei %A Amara, Amara %B ICECS %D 2008 %I IEEE %K dblp %P 554-557 %T An innovative sub-32nm SRAM voltage sense amplifier in double-gate CMOS insensitive to process variations and transistor mismatch. %U http://dblp.uni-trier.de/db/conf/icecsys/icecsys2008.html#NasalskiMGVA08 %@ 978-1-4244-2181-7

@inproceedings{conf/icecsys/NasalskiMGVA08, added-at = {2017-05-23T00:00:00.000+0200}, author = {Nasalski, Piotr and Makosiej, Adam and Giraud, Bastien and Vladimirescu, Andrei and Amara, Amara}, biburl = {https://www.bibsonomy.org/bibtex/28a703e68e24720cbd02da2f7462abb34/dblp}, booktitle = {ICECS}, crossref = {conf/icecsys/2008}, ee = {https://doi.org/10.1109/ICECS.2008.4674913}, interhash = {c9b73955740102688b28e8c5e894ec7d}, intrahash = {8a703e68e24720cbd02da2f7462abb34}, isbn = {978-1-4244-2181-7}, keywords = {dblp}, pages = {554-557}, publisher = {IEEE}, timestamp = {2019-10-17T19:51:54.000+0200}, title = {An innovative sub-32nm SRAM voltage sense amplifier in double-gate CMOS insensitive to process variations and transistor mismatch.}, url = {http://dblp.uni-trier.de/db/conf/icecsys/icecsys2008.html#NasalskiMGVA08}, year = 2008 }