%0 Journal Article %1 journals/jssc/ZhouWSZZZZZKYG17 %A Zhou, Dajiang %A Wang, Shihao %A Sun, Heming %A Zhou, Jian-Bin %A Zhu, Jiayi %A Zhao, Yijin %A Zhou, Jinjia %A Zhang, Shuping %A Kimura, Shinji %A Yoshimura, Takeshi %A Goto, Satoshi %D 2017 %J IEEE J. Solid State Circuits %K dblp %N 1 %P 113-126 %T An 8K H.265/HEVC Video Decoder Chip With a New System Pipeline Design. %U http://dblp.uni-trier.de/db/journals/jssc/jssc52.html#ZhouWSZZZZZKYG17 %V 52

@article{journals/jssc/ZhouWSZZZZZKYG17, added-at = {2020-09-05T00:00:00.000+0200}, author = {Zhou, Dajiang and Wang, Shihao and Sun, Heming and Zhou, Jian-Bin and Zhu, Jiayi and Zhao, Yijin and Zhou, Jinjia and Zhang, Shuping and Kimura, Shinji and Yoshimura, Takeshi and Goto, Satoshi}, biburl = {https://www.bibsonomy.org/bibtex/257d7a51f6600a3d0ae2b9a89588aa4f2/dblp}, ee = {https://doi.org/10.1109/JSSC.2016.2616362}, interhash = {cc1f53e6db80e320910be05c9d458c20}, intrahash = {57d7a51f6600a3d0ae2b9a89588aa4f2}, journal = {IEEE J. Solid State Circuits}, keywords = {dblp}, number = 1, pages = {113-126}, timestamp = {2020-09-09T11:43:52.000+0200}, title = {An 8K H.265/HEVC Video Decoder Chip With a New System Pipeline Design.}, url = {http://dblp.uni-trier.de/db/journals/jssc/jssc52.html#ZhouWSZZZZZKYG17}, volume = 52, year = 2017 }