%0 Conference Paper %1 conf/vlsid/RajaAB03 %A Raja, Tezaswi %A Agrawal, Vishwani D. %A Bushnell, Michael L. %B VLSI Design %D 2003 %I IEEE Computer Society %K dblp %P 527-532 %T Minimum Dynamic Power CMOS Circuit Design by a Reduced Constraint Set Linear Program. %U http://dblp.uni-trier.de/db/conf/vlsid/vlsid2003.html#RajaAB03 %@ 0-7695-1868-0

@inproceedings{conf/vlsid/RajaAB03, added-at = {2023-03-24T00:00:00.000+0100}, author = {Raja, Tezaswi and Agrawal, Vishwani D. and Bushnell, Michael L.}, biburl = {https://www.bibsonomy.org/bibtex/220195de4aa28a200e34ba5ed291945ae/dblp}, booktitle = {VLSI Design}, crossref = {conf/vlsid/2003}, ee = {https://doi.ieeecomputersociety.org/10.1109/ICVD.2003.1183188}, interhash = {d6ff8f418a81fcbb173b88c3a534de86}, intrahash = {20195de4aa28a200e34ba5ed291945ae}, isbn = {0-7695-1868-0}, keywords = {dblp}, pages = {527-532}, publisher = {IEEE Computer Society}, timestamp = {2024-04-10T04:18:49.000+0200}, title = {Minimum Dynamic Power CMOS Circuit Design by a Reduced Constraint Set Linear Program.}, url = {http://dblp.uni-trier.de/db/conf/vlsid/vlsid2003.html#RajaAB03}, year = 2003 }