%0 Journal Article %1 torresen:2002:GPEM %A Torresen, Jim %D 2002 %J Genetic Programming and Evolvable Machines %K FPGA algorithms, classifier digital evolvable genetic hardware, logic, systems, %N 3 %P 259--282 %R doi:10.1023/A:1020163325179 %T A Scalable Approach to Evolvable Hardware %V 3 %X Evolvable Hardware (EHW) has been proposed as a new method for designing systems for complex real-world applications. However, so far, only relatively simple systems have been shown to be evolvable. In this paper, it is proposed that concepts from biology should be applied to EHW techniques to make EHW more applicable to solving complex problems. One such concept has led to the increased complexity scheme presented, where a system is evolved by evolving smaller sub-systems. Experiments with two different tasks illustrate that inclusion of this scheme substantially reduces the number of generations required for evolution. Further, for the prosthesis control task, the best performance is obtained by the novel approach. The best circuit evolved performs better than the best trained neural network.

@article{torresen:2002:GPEM, abstract = {Evolvable Hardware (EHW) has been proposed as a new method for designing systems for complex real-world applications. However, so far, only relatively simple systems have been shown to be evolvable. In this paper, it is proposed that concepts from biology should be applied to EHW techniques to make EHW more applicable to solving complex problems. One such concept has led to the increased complexity scheme presented, where a system is evolved by evolving smaller sub-systems. Experiments with two different tasks illustrate that inclusion of this scheme substantially reduces the number of generations required for evolution. Further, for the prosthesis control task, the best performance is obtained by the novel approach. The best circuit evolved performs better than the best trained neural network.}, added-at = {2008-06-19T17:46:40.000+0200}, author = {Torresen, Jim}, biburl = {https://www.bibsonomy.org/bibtex/2245342a46221b658ca61bc5a50b03c27/brazovayeye}, doi = {doi:10.1023/A:1020163325179}, interhash = {eb1c55d1057952e98b41800cb38a0c69}, intrahash = {245342a46221b658ca61bc5a50b03c27}, issn = {1389-2576}, journal = {Genetic Programming and Evolvable Machines}, keywords = {FPGA algorithms, classifier digital evolvable genetic hardware, logic, systems,}, month = {September}, notes = {Article ID: 5091791}, number = 3, pages = {259--282}, timestamp = {2008-06-19T17:53:16.000+0200}, title = {A Scalable Approach to Evolvable Hardware}, volume = 3, year = 2002 }