<?xml version="1.0" encoding="UTF-8"?>
<!DOCTYPE rdf:RDF [
 <!ENTITY rdf 'http://www.w3.org/1999/02/22-rdf-syntax-ns#'>
 <!ENTITY rdfs 'http://www.w3.org/2000/01/rdf-schema#'>

 <!ENTITY swrc 'http://swrc.ontoware.org/ontology#'>
 <!ENTITY xsd 'http://www.w3.org/2001/XMLSchema#'>
]>

<rdf:RDF
 xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#"
 xmlns="http://purl.org/rss/1.0/"
 xmlns:cc="http://web.resource.org/cc/"
 xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/"
 xmlns:dc="http://purl.org/dc/elements/1.1/"
 xmlns:syn="http://purl.org/rss/1.0/modules/syndication/"
 xmlns:content="http://purl.org/rss/1.0/modules/content/"
 xmlns:admin="http://webns.net/mvcb/"
 xmlns:burst="http://xmlns.com/burst/0.1/"
 
 xmlns:rdfs="&rdfs;"
 xmlns:swrc="&swrc;"
 xmlns:xsd="&xsd;"
>

<channel rdf:about="http://www.bibsonomy.org/uri/author/Argyrides">
  <title>BibSonomy publications for /author/Argyrides</title>
  <link>http://www.bibsonomy.org/burst/author/Argyrides</link>
  <description>BibSonomy BuRST Feed for /author/Argyrides</description>
  <dc:date>2008-07-20T23:21:05+02:00</dc:date>

  <items>
    <rdf:Seq>
      <rdf:li rdf:resource="http://www.bibsonomy.org/uri/bibtex/21e02595bb85bb39a478c50782a51be2a/dblp"/>
      <rdf:li rdf:resource="http://www.bibsonomy.org/uri/bibtex/2ecf47bfb1898cdd9742fd2390b182e7d/dblp"/>
      <rdf:li rdf:resource="http://www.bibsonomy.org/uri/bibtex/2533de94323df0e674a59ebd434aaeede/dblp"/>
      <rdf:li rdf:resource="http://www.bibsonomy.org/uri/bibtex/29111b280e508a708d6a187986ab1d15c/dblp"/>
      <rdf:li rdf:resource="http://www.bibsonomy.org/uri/bibtex/28fca669e0f246d9fa9e19836576e2be6/dblp"/>
      <rdf:li rdf:resource="http://www.bibsonomy.org/uri/bibtex/2b339f794e0aecde1ed88a4d957952db5/dblp"/>
      </rdf:Seq>
  </items>
</channel>

<item rdf:about="http://www.bibsonomy.org/uri/bibtex/21e02595bb85bb39a478c50782a51be2a/dblp">
    <title>Single Error Correcting Finite Field Multipliers Over GF(2m).</title>
    <description>dblp</description><link>http://www.bibsonomy.org/bibtex/21e02595bb85bb39a478c50782a51be2a/dblp</link>
    <dc:creator>dblp</dc:creator>
    <dc:date>2008-05-16T00:00:00+02:00</dc:date>
    <dc:subject>dblp </dc:subject>
    <content:encoded>
	    <![CDATA[
        <div class="block">
	      <div class="bmtitle">

  <a href="http://www.bibsonomy.org/bibtex/21e02595bb85bb39a478c50782a51be2a/dblp">Single Error Correcting Finite Field Multipliers Over GF(2m).</a>
</div>
<div class="bmdesc">
  <span style="color:#555555;"> 
    Jimson <a href="http://www.bibsonomy.org/author/Mathew">Mathew</a>         	     	 
        	  and Costas <a href="http://www.bibsonomy.org/author/Argyrides">Argyrides</a>         	     	 
        	  and Abusaleh M. <a href="http://www.bibsonomy.org/author/Jabir">Jabir</a>         	     	 
        	  and Hafizur <a href="http://www.bibsonomy.org/author/Rahaman">Rahaman</a>         	     	 
        	  and Dhiraj K. <a href="http://www.bibsonomy.org/author/Pradhan">Pradhan</a>         	     	 
        	 </span> 
  <em>VLSI Design</em>
    33-38
  (2008)
</div>
<span class="bmmeta">
  
  
        to
        <span class="bmtags">
        <a href="http://www.bibsonomy.org/user/dblp/dblp">dblp</a>
        </span>
        

          by <a href="http://www.bibsonomy.org/user/dblp">dblp</a> 
        
        
        on 2008-05-16 00:00:00 </span></div>
	    ]]>
    </content:encoded>
    <taxo:topics>
      <rdf:Bag>
        <rdf:li rdf:resource="http://www.bibsonomy.org/tag/dblp" />
        </rdf:Bag>
    </taxo:topics>
    <burst:publication>
      <swrc:InProceedings>
        <swrc:booktitle>VLSI Design</swrc:booktitle><swrc:crossref>conf/vlsid/2008</swrc:crossref><swrc:pages>33-38</swrc:pages><swrc:publisher><swrc:Organization swrc:name="IEEE Computer Society"/></swrc:publisher><swrc:title>Single Error Correcting Finite Field Multipliers Over GF(2m).</swrc:title><swrc:year>2008</swrc:year><swrc:keywords>dblp </swrc:keywords><swrc:date>2008-05-16 00:00:00.0</swrc:date><swrc:hasExtraField>
    <swrc:Field swrc:key="ee" swrc:value="http://doi.ieeecomputersociety.org/10.1109/VLSI.2008.105"/>
  </swrc:hasExtraField>
<swrc:hasExtraField>
    <swrc:Field swrc:key="date" swrc:value="2008-05-16"/>
  </swrc:hasExtraField>
<swrc:author>
  <rdf:Seq>
  <rdf:_1><swrc:Person swrc:name="Jimson Mathew" /></rdf:_1>
  <rdf:_2><swrc:Person swrc:name="Costas Argyrides" /></rdf:_2>
  <rdf:_3><swrc:Person swrc:name="Abusaleh M. Jabir" /></rdf:_3>
  <rdf:_4><swrc:Person swrc:name="Hafizur Rahaman" /></rdf:_4>
  <rdf:_5><swrc:Person swrc:name="Dhiraj K. Pradhan" /></rdf:_5>
  </rdf:Seq>
</swrc:author>

<swrc:editor>
  <rdf:Seq>
  </rdf:Seq>
</swrc:editor></swrc:InProceedings>  
    </burst:publication>
  </item>
<item rdf:about="http://www.bibsonomy.org/uri/bibtex/2ecf47bfb1898cdd9742fd2390b182e7d/dblp">
    <title>Algorithm Level Fault Tolerance: A Technique to Cope with Long Duration Transient Faults in Matrix Multiplication Algorithms.</title>
    <description>dblp</description><link>http://www.bibsonomy.org/bibtex/2ecf47bfb1898cdd9742fd2390b182e7d/dblp</link>
    <dc:creator>dblp</dc:creator>
    <dc:date>2008-05-07T00:00:00+02:00</dc:date>
    <dc:subject>dblp </dc:subject>
    <content:encoded>
	    <![CDATA[
        <div class="block">
	      <div class="bmtitle">

  <a href="http://www.bibsonomy.org/bibtex/2ecf47bfb1898cdd9742fd2390b182e7d/dblp">Algorithm Level Fault Tolerance: A Technique to Cope with Long Duration Transient Faults in Matrix Multiplication Algorithms.</a>
</div>
<div class="bmdesc">
  <span style="color:#555555;"> 
    Carlos Arthur Lang <a href="http://www.bibsonomy.org/author/Lisb%C3%B4a">Lisbôa</a>         	     	 
        	  and Costas <a href="http://www.bibsonomy.org/author/Argyrides">Argyrides</a>         	     	 
        	  and Dhiraj K. <a href="http://www.bibsonomy.org/author/Pradhan">Pradhan</a>         	     	 
        	  and Luigi <a href="http://www.bibsonomy.org/author/Carro">Carro</a>         	     	 
        	 </span> 
  <em>VTS</em>
    363-370
  (2008)
</div>
<span class="bmmeta">
  
  
        to
        <span class="bmtags">
        <a href="http://www.bibsonomy.org/user/dblp/dblp">dblp</a>
        </span>
        

          by <a href="http://www.bibsonomy.org/user/dblp">dblp</a> 
        
        
        on 2008-05-07 00:00:00 </span></div>
	    ]]>
    </content:encoded>
    <taxo:topics>
      <rdf:Bag>
        <rdf:li rdf:resource="http://www.bibsonomy.org/tag/dblp" />
        </rdf:Bag>
    </taxo:topics>
    <burst:publication>
      <swrc:InProceedings>
        <swrc:booktitle>VTS</swrc:booktitle><swrc:crossref>conf/vts/2008</swrc:crossref><swrc:pages>363-370</swrc:pages><swrc:publisher><swrc:Organization swrc:name="IEEE Computer Society"/></swrc:publisher><swrc:title>Algorithm Level Fault Tolerance: A Technique to Cope with Long Duration Transient Faults in Matrix Multiplication Algorithms.</swrc:title><swrc:year>2008</swrc:year><swrc:keywords>dblp </swrc:keywords><swrc:date>2008-05-07 00:00:00.0</swrc:date><swrc:hasExtraField>
    <swrc:Field swrc:key="ee" swrc:value="http://doi.ieeecomputersociety.org/10.1109/VTS.2008.29"/>
  </swrc:hasExtraField>
<swrc:hasExtraField>
    <swrc:Field swrc:key="date" swrc:value="2008-05-07"/>
  </swrc:hasExtraField>
<swrc:author>
  <rdf:Seq>
  <rdf:_1><swrc:Person swrc:name="Carlos Arthur Lang Lisbôa" /></rdf:_1>
  <rdf:_2><swrc:Person swrc:name="Costas Argyrides" /></rdf:_2>
  <rdf:_3><swrc:Person swrc:name="Dhiraj K. Pradhan" /></rdf:_3>
  <rdf:_4><swrc:Person swrc:name="Luigi Carro" /></rdf:_4>
  </rdf:Seq>
</swrc:author>

<swrc:editor>
  <rdf:Seq>
  </rdf:Seq>
</swrc:editor></swrc:InProceedings>  
    </burst:publication>
  </item>
<item rdf:about="http://www.bibsonomy.org/uri/bibtex/2533de94323df0e674a59ebd434aaeede/dblp">
    <title>CLB-based Detection and Correction of Bit-flip faults in SRAM-based FPGAs.</title>
    <description>dblp</description><link>http://www.bibsonomy.org/bibtex/2533de94323df0e674a59ebd434aaeede/dblp</link>
    <dc:creator>dblp</dc:creator>
    <dc:date>2007-07-16T00:00:00+02:00</dc:date>
    <dc:subject>dblp </dc:subject>
    <content:encoded>
	    <![CDATA[
        <div class="block">
	      <div class="bmtitle">

  <a href="http://www.bibsonomy.org/bibtex/2533de94323df0e674a59ebd434aaeede/dblp">CLB-based Detection and Correction of Bit-flip faults in SRAM-based FPGAs.</a>
</div>
<div class="bmdesc">
  <span style="color:#555555;"> 
    Hamid R. <a href="http://www.bibsonomy.org/author/Zarandi">Zarandi</a>         	     	 
        	  and Seyed Ghassem <a href="http://www.bibsonomy.org/author/Miremadi">Miremadi</a>         	     	 
        	  and Costas <a href="http://www.bibsonomy.org/author/Argyrides">Argyrides</a>         	     	 
        	  and Dhiraj K. <a href="http://www.bibsonomy.org/author/Pradhan">Pradhan</a>         	     	 
        	 </span> 
  <em>ISCAS</em>
    3696-3699
  (2007)
</div>
<span class="bmmeta">
  
  
        to
        <span class="bmtags">
        <a href="http://www.bibsonomy.org/user/dblp/dblp">dblp</a>
        </span>
        

          by <a href="http://www.bibsonomy.org/user/dblp">dblp</a> 
        
        
        on 2007-07-16 00:00:00 </span></div>
	    ]]>
    </content:encoded>
    <taxo:topics>
      <rdf:Bag>
        <rdf:li rdf:resource="http://www.bibsonomy.org/tag/dblp" />
        </rdf:Bag>
    </taxo:topics>
    <burst:publication>
      <swrc:InProceedings>
        <swrc:booktitle>ISCAS</swrc:booktitle><swrc:crossref>conf/iscas/2007</swrc:crossref><swrc:pages>3696-3699</swrc:pages><swrc:publisher><swrc:Organization swrc:name="IEEE"/></swrc:publisher><swrc:title>CLB-based Detection and Correction of Bit-flip faults in SRAM-based FPGAs.</swrc:title><swrc:year>2007</swrc:year><swrc:keywords>dblp </swrc:keywords><swrc:date>2007-07-16 00:00:00.0</swrc:date><swrc:hasExtraField>
    <swrc:Field swrc:key="ee" swrc:value="http://doi.ieeecomputersociety.org/10.1109/ISCAS.2007.378645"/>
  </swrc:hasExtraField>
<swrc:hasExtraField>
    <swrc:Field swrc:key="date" swrc:value="2007-07-16"/>
  </swrc:hasExtraField>
<swrc:author>
  <rdf:Seq>
  <rdf:_1><swrc:Person swrc:name="Hamid R. Zarandi" /></rdf:_1>
  <rdf:_2><swrc:Person swrc:name="Seyed Ghassem Miremadi" /></rdf:_2>
  <rdf:_3><swrc:Person swrc:name="Costas Argyrides" /></rdf:_3>
  <rdf:_4><swrc:Person swrc:name="Dhiraj K. Pradhan" /></rdf:_4>
  </rdf:Seq>
</swrc:author>

<swrc:editor>
  <rdf:Seq>
  </rdf:Seq>
</swrc:editor></swrc:InProceedings>  
    </burst:publication>
  </item>
<item rdf:about="http://www.bibsonomy.org/uri/bibtex/29111b280e508a708d6a187986ab1d15c/dblp">
    <title>Multiple Upsets Tolerance in SRAM Memory.</title>
    <description>dblp</description><link>http://www.bibsonomy.org/bibtex/29111b280e508a708d6a187986ab1d15c/dblp</link>
    <dc:creator>dblp</dc:creator>
    <dc:date>2007-07-16T00:00:00+02:00</dc:date>
    <dc:subject>dblp </dc:subject>
    <content:encoded>
	    <![CDATA[
        <div class="block">
	      <div class="bmtitle">

  <a href="http://www.bibsonomy.org/bibtex/29111b280e508a708d6a187986ab1d15c/dblp">Multiple Upsets Tolerance in SRAM Memory.</a>
</div>
<div class="bmdesc">
  <span style="color:#555555;"> 
    Costas <a href="http://www.bibsonomy.org/author/Argyrides">Argyrides</a>         	     	 
        	  and Hamid R. <a href="http://www.bibsonomy.org/author/Zarandi">Zarandi</a>         	     	 
        	  and Dhiraj K. <a href="http://www.bibsonomy.org/author/Pradhan">Pradhan</a>         	     	 
        	 </span> 
  <em>ISCAS</em>
    365-368
  (2007)
</div>
<span class="bmmeta">
  
  
        to
        <span class="bmtags">
        <a href="http://www.bibsonomy.org/user/dblp/dblp">dblp</a>
        </span>
        

          by <a href="http://www.bibsonomy.org/user/dblp">dblp</a> 
        
        
        on 2007-07-16 00:00:00 </span></div>
	    ]]>
    </content:encoded>
    <taxo:topics>
      <rdf:Bag>
        <rdf:li rdf:resource="http://www.bibsonomy.org/tag/dblp" />
        </rdf:Bag>
    </taxo:topics>
    <burst:publication>
      <swrc:InProceedings>
        <swrc:booktitle>ISCAS</swrc:booktitle><swrc:crossref>conf/iscas/2007</swrc:crossref><swrc:pages>365-368</swrc:pages><swrc:publisher><swrc:Organization swrc:name="IEEE"/></swrc:publisher><swrc:title>Multiple Upsets Tolerance in SRAM Memory.</swrc:title><swrc:year>2007</swrc:year><swrc:keywords>dblp </swrc:keywords><swrc:date>2007-07-16 00:00:00.0</swrc:date><swrc:hasExtraField>
    <swrc:Field swrc:key="ee" swrc:value="http://doi.ieeecomputersociety.org/10.1109/ISCAS.2007.378465"/>
  </swrc:hasExtraField>
<swrc:hasExtraField>
    <swrc:Field swrc:key="date" swrc:value="2007-07-16"/>
  </swrc:hasExtraField>
<swrc:author>
  <rdf:Seq>
  <rdf:_1><swrc:Person swrc:name="Costas Argyrides" /></rdf:_1>
  <rdf:_2><swrc:Person swrc:name="Hamid R. Zarandi" /></rdf:_2>
  <rdf:_3><swrc:Person swrc:name="Dhiraj K. Pradhan" /></rdf:_3>
  </rdf:Seq>
</swrc:author>

<swrc:editor>
  <rdf:Seq>
  </rdf:Seq>
</swrc:editor></swrc:InProceedings>  
    </burst:publication>
  </item>
<item rdf:about="http://www.bibsonomy.org/uri/bibtex/28fca669e0f246d9fa9e19836576e2be6/dblp">
    <title>Highly Reliable Power Aware Memory Design.</title>
    <description>dblp</description><link>http://www.bibsonomy.org/bibtex/28fca669e0f246d9fa9e19836576e2be6/dblp</link>
    <dc:creator>dblp</dc:creator>
    <dc:date>2007-07-09T00:00:00+02:00</dc:date>
    <dc:subject>dblp </dc:subject>
    <content:encoded>
	    <![CDATA[
        <div class="block">
	      <div class="bmtitle">

  <a href="http://www.bibsonomy.org/bibtex/28fca669e0f246d9fa9e19836576e2be6/dblp">Highly Reliable Power Aware Memory Design.</a>
</div>
<div class="bmdesc">
  <span style="color:#555555;"> 
    Costas <a href="http://www.bibsonomy.org/author/Argyrides">Argyrides</a>         	     	 
        	  and Dhiraj K. <a href="http://www.bibsonomy.org/author/Pradhan">Pradhan</a>         	     	 
        	 </span> 
  <em>IOLTS</em>
    189-190
  (2007)
</div>
<span class="bmmeta">
  
  
        to
        <span class="bmtags">
        <a href="http://www.bibsonomy.org/user/dblp/dblp">dblp</a>
        </span>
        

          by <a href="http://www.bibsonomy.org/user/dblp">dblp</a> 
        
        
        on 2007-07-09 00:00:00 </span></div>
	    ]]>
    </content:encoded>
    <taxo:topics>
      <rdf:Bag>
        <rdf:li rdf:resource="http://www.bibsonomy.org/tag/dblp" />
        </rdf:Bag>
    </taxo:topics>
    <burst:publication>
      <swrc:InProceedings>
        <swrc:booktitle>IOLTS</swrc:booktitle><swrc:crossref>conf/iolts/2007</swrc:crossref><swrc:pages>189-190</swrc:pages><swrc:publisher><swrc:Organization swrc:name="IEEE Computer Society"/></swrc:publisher><swrc:title>Highly Reliable Power Aware Memory Design.</swrc:title><swrc:year>2007</swrc:year><swrc:keywords>dblp </swrc:keywords><swrc:date>2007-07-09 00:00:00.0</swrc:date><swrc:hasExtraField>
    <swrc:Field swrc:key="ee" swrc:value="http://doi.ieeecomputersociety.org/10.1109/IOLTS.2007.37"/>
  </swrc:hasExtraField>
<swrc:hasExtraField>
    <swrc:Field swrc:key="date" swrc:value="2007-07-09"/>
  </swrc:hasExtraField>
<swrc:author>
  <rdf:Seq>
  <rdf:_1><swrc:Person swrc:name="Costas Argyrides" /></rdf:_1>
  <rdf:_2><swrc:Person swrc:name="Dhiraj K. Pradhan" /></rdf:_2>
  </rdf:Seq>
</swrc:author>

<swrc:editor>
  <rdf:Seq>
  </rdf:Seq>
</swrc:editor></swrc:InProceedings>  
    </burst:publication>
  </item>
<item rdf:about="http://www.bibsonomy.org/uri/bibtex/2b339f794e0aecde1ed88a4d957952db5/dblp">
    <title>Fast SEU Detection and Correction in LUT Configuration Bits of SRAM-based FPGAs.</title>
    <description>dblp</description><link>http://www.bibsonomy.org/bibtex/2b339f794e0aecde1ed88a4d957952db5/dblp</link>
    <dc:creator>dblp</dc:creator>
    <dc:date>2007-06-23T00:00:00+02:00</dc:date>
    <dc:subject>dblp </dc:subject>
    <content:encoded>
	    <![CDATA[
        <div class="block">
	      <div class="bmtitle">

  <a href="http://www.bibsonomy.org/bibtex/2b339f794e0aecde1ed88a4d957952db5/dblp">Fast SEU Detection and Correction in LUT Configuration Bits of SRAM-based FPGAs.</a>
</div>
<div class="bmdesc">
  <span style="color:#555555;"> 
    Hamid R. <a href="http://www.bibsonomy.org/author/Zarandi">Zarandi</a>         	     	 
        	  and Seyed Ghassem <a href="http://www.bibsonomy.org/author/Miremadi">Miremadi</a>         	     	 
        	  and Costas <a href="http://www.bibsonomy.org/author/Argyrides">Argyrides</a>         	     	 
        	  and Dhiraj K. <a href="http://www.bibsonomy.org/author/Pradhan">Pradhan</a>         	     	 
        	 </span> 
  <em>IPDPS</em>
    1-6
  (2007)
</div>
<span class="bmmeta">
  
  
        to
        <span class="bmtags">
        <a href="http://www.bibsonomy.org/user/dblp/dblp">dblp</a>
        </span>
        

          by <a href="http://www.bibsonomy.org/user/dblp">dblp</a> 
        
        
        on 2007-06-23 00:00:00 </span></div>
	    ]]>
    </content:encoded>
    <taxo:topics>
      <rdf:Bag>
        <rdf:li rdf:resource="http://www.bibsonomy.org/tag/dblp" />
        </rdf:Bag>
    </taxo:topics>
    <burst:publication>
      <swrc:InProceedings>
        <swrc:booktitle>IPDPS</swrc:booktitle><swrc:crossref>conf/ipps/2007</swrc:crossref><swrc:pages>1-6</swrc:pages><swrc:publisher><swrc:Organization swrc:name="IEEE"/></swrc:publisher><swrc:title>Fast SEU Detection and Correction in LUT Configuration Bits of SRAM-based FPGAs.</swrc:title><swrc:year>2007</swrc:year><swrc:keywords>dblp </swrc:keywords><swrc:date>2007-06-23 00:00:00.0</swrc:date><swrc:hasExtraField>
    <swrc:Field swrc:key="ee" swrc:value="http://dx.doi.org/10.1109/IPDPS.2007.370378"/>
  </swrc:hasExtraField>
<swrc:hasExtraField>
    <swrc:Field swrc:key="date" swrc:value="2007-06-23"/>
  </swrc:hasExtraField>
<swrc:author>
  <rdf:Seq>
  <rdf:_1><swrc:Person swrc:name="Hamid R. Zarandi" /></rdf:_1>
  <rdf:_2><swrc:Person swrc:name="Seyed Ghassem Miremadi" /></rdf:_2>
  <rdf:_3><swrc:Person swrc:name="Costas Argyrides" /></rdf:_3>
  <rdf:_4><swrc:Person swrc:name="Dhiraj K. Pradhan" /></rdf:_4>
  </rdf:Seq>
</swrc:author>

<swrc:editor>
  <rdf:Seq>
  </rdf:Seq>
</swrc:editor></swrc:InProceedings>  
    </burst:publication>
  </item>
</rdf:RDF>