BibSonomyburst/author/HasanBibSonomy RSS feed for /author/Hasan2012-02-15T14:36:55+01:00http://www.bibsonomy.org/bibtex/24b01e91ada89efcbaca695bf2acdad4b/idesajithidesajith2012-02-15T12:54:50+01:00dapv <span class="authorEditorList"><a href="/author/Aminul Islam">Mohd. Hasan Aminul Islam</a> </span><em>International Journal on Communication</em> <em>2(2):9</em> (<em>July 2011</em>)Wed Feb 15 12:54:50 CET 2012International Journal on Communicationjuly29Design and Analysis of Power and Variability Aware Digital Summing Circuit 22011dapv Due to aggressive scaling and process imperfection in sub-45 nm technology node Vt (threshold voltage) shift is more pronounced causing large variations in circuit response. Therefore, this paper presents the analyses of various popular 1-bit digital summing circuits in light of PVT (process, voltage and temperature) variations to verify their functionality and robustness. The investigation is carried with ±3ó process parameters and ±10% VDD (supply voltage) variation by applying Gaussian distribution and Monte Carlo analysis at 22 nm technology node on HSPICE environment. Design guidelines are derived to select the most suitable topology for the design features required. Transmission Gate (TG)-based digital summing circuit is found to be the most robust against PVT variations. Hence, a TG-based digital summing circuit is implemented using carbon nanotube field effect transistor (CNFET). This implementation offers tighter spread in propagation delay (3×), power dissipation (1.14×) and EDP (energy delay product) (1.1×) at nominal voltage of VDD = 0.95V compared to MOSFET-based (TG – topology) digital summing circuit implying its robustness against PVT variations. http://www.bibsonomy.org/bibtex/217feb5cbe5842cd029b903b22d881a91/idesajithidesajith2012-02-15T12:37:43+01:00eept <span class="authorEditorList"><a href="/author/Aminul Islam1, M. W. Akram">Mohd. Hasan Aminul Islam1, M. W. Akram</a> </span><em>International Journal on Communication</em> <em>2(2):7</em> (<em>July 2011</em>)Wed Feb 15 12:37:43 CET 2012International Journal on Communicationjuly27Energy Efficient and Process Tolerant Full Adder in Technologies beyond CMOS 22011eept This paper presents 1-bit full adder cell in emerging technologies like FinFET and CNFET that operates in the moderate inversion region for energy efficiency, robustness and higher performance. The performance of the adder is improved by the optimum selection of important process parameters like oxide and fin thickness in FinFET and number of carbon nanotubes, chirality vector and pitch in CNFET. The optimized CNFET-based full adder (OP-CNFET) has higher speed, lower PDP (power-delay product) and lower power dissipation as compared to the MOSFET and FinFET full adder cells. The OP-CNFET design also offers tight spread in power, delay and PDP variability against process, voltage and temperature variations. All the evaluations have been carried out using HSPICE simulations based on 32 nm BPTM (Berkeley Predictive Technology Model). http://www.bibsonomy.org/bibtex/2fdb87b1772842ad10785f6e0938a3aea/idesajithidesajith2012-02-14T10:39:38+01:00paid <span class="authorEditorList"><a href="/author/S.D.Pable">Mohd. Hasan S.D.Pable</a> </span><em>International Journal on Electrical and Power Engineering IJEPE,</em> <em>2(1):6</em> (<em>February 2011</em>)Tue Feb 14 10:39:38 CET 2012International Journal on Electrical and Power Engineering [IJEPE],february16Performance Analysis of Interconnect Drivers for Ultralow Power Applications 22011paid ultralow power consumption requirement of low throughput applications needs to operate circuits in subthreshold region where subthreshold leakage current is used as active current for necessary computations. This paper investigates the impact of interconnect drivers on digital circuit performance in subthreshold region. In particular, we have investigates the performance of Si-MOSFET and CNFETs at 32nm deep submicron technology node. Performance Analysis is carried out for different interconnect drivers driving global interconnect. We have proposed an optimized CNFET driver which gives the significant improvement in delay and PDP over conventional CNFET in subthreshold for global and semi-global interconnect length. HSPICE device model files generated from “Nano CMOS” tool are use for Si-MOSFET to analyze the impact of Process and Temperature (P, T) variations on robustness of circuit for fair comparison with CNFET. Variability of design metric parameters is evaluated by applying Gaussian distribution using Monte Carlo simulation run. http://www.bibsonomy.org/bibtex/25ffc81f47e70590f912cb0dd0421ca30/dblpdblp2012-02-14T00:00:00+01:00dblp <span class="authorEditorList"><a href="/author/An">Dong An</a>, and <a href="/author/Cam">Hasan Cam</a> </span><em>WCNC, </em><em>page 2495-2500. </em><em>IEEE, </em>(<em>2007</em>)Tue Feb 14 00:00:00 CET 2012WCNCconf/wcnc/20072495-2500Route Recovery with One-Hop Broadcast to Bypass Compromised Nodes in Wireless Sensor Networks.2007dblp http://www.bibsonomy.org/bibtex/29f71e77b562aded90e43e98f49dc1111/dblpdblp2012-02-13T00:00:00+01:00dblp <span class="authorEditorList"><a href="/author/Mir">Hasan S. Mir</a>, and <a href="/author/Carlson">Blair D. Carlson</a> </span><em>IEEE T. Instrumentation and Measurement</em> <em>61(3):655-663</em> (<em>2012</em>)Mon Feb 13 00:00:00 CET 2012IEEE T. Instrumentation and Measurement3655-663On the Definition of Radar Range Resolution for Targets of Greatly Differing RCS.612012dblp http://www.bibsonomy.org/bibtex/2dadcce86e45662d6e8fca4a05a876fca/dblpdblp2012-02-08T00:00:00+01:00dblp <span class="authorEditorList"><a href="/author/Aktulga">Hasan Metin Aktulga</a>, <a href="/author/Pandit">Sagar Pandit</a>, <a href="/author/van Duin">Adri C. T. van Duin</a>, and <a href="/author/Grama">Ananth Grama</a> </span><em>SIAM J. Scientific Computing</em> (<em>2012</em>)Wed Feb 08 00:00:00 CET 2012SIAM J. Scientific Computing1Reactive Molecular Dynamics: Numerical Methods and Algorithmic Techniques.342012dblp http://www.bibsonomy.org/bibtex/292c354aa471ed18003a61b77ae1880a5/dblpdblp2012-02-07T00:00:00+01:00dblp <span class="authorEditorList"><a href="/author/Hossain">Md. Mottaleb Hossain</a>, <a href="/author/Humayun">Md. Abdullah-Al Humayun</a>, <a href="/author/Hasan">Md. Tanvir Hasan</a>, <a href="/author/Bhuiyan">Ashraful Ghani Bhuiyan</a>, <a href="/author/Hashimoto">Akihiro Hashimoto</a>, and <a href="/author/Yamamoto">Akio Yamamoto</a> </span><em>IEICE Transactions</em> <em>95-C(2):255-261</em> (<em>2012</em>)Tue Feb 07 00:00:00 CET 2012IEICE Transactions2255-261Proposal of High Performance 1.55 µm Quantum Dot Heterostructure Laser Using InN.95-C2012dblp http://www.bibsonomy.org/bibtex/2e2bb65e9c5e0ddfd12f4690a774f027a/dblpdblp2012-02-06T00:00:00+01:00dblp <span class="authorEditorList"><a href="/author/Hasan">Muhammad A. Hasan</a>, <a href="/author/Lee">Seok-Lyong Lee</a>, <a href="/author/Kim">Deok-Hwan Kim</a>, and <a href="/author/Lim">Myung-Kwan Lim</a> </span><em>Computer Methods and Programs in Biomedicine</em> <em>105(2):95-108</em> (<em>2012</em>)Mon Feb 06 00:00:00 CET 2012Computer Methods and Programs in Biomedicine295-108Automatic evaluation of cardiac hypertrophy using cardiothoracic area ratio in chest radiograph images.1052012dblp http://www.bibsonomy.org/bibtex/234bc77d1d1ea76dd43f49375e3276d0e/dblpdblp2012-02-06T00:00:00+01:00dblp <span class="authorEditorList"><a href="/author/Hasan">Nany Hasan</a>, and <a href="/author/Liu">C. L. Liu</a> </span><em>FTCS, </em><em>page 348-353. </em><em>IEEE Computer Society, </em>(<em>1988</em>)Mon Feb 06 00:00:00 CET 2012FTCSconf/ftcs/1988348-353Minimum fault coverage in reconfigurable arrays.1988dblp http://www.bibsonomy.org/bibtex/24eda0fd0ee68aff59ced015d87a58322/dblpdblp2012-02-03T00:00:00+01:00dblp <span class="authorEditorList"><a href="/author/Imdad">M. Imdad</a>, <a href="/author/Ali">Javid Ali</a>, and <a href="/author/Hasan">M. Hasan</a> </span><em>Mathematical and Computer Modelling</em> <em>55(3-4):770-778</em> (<em>2012</em>)Fri Feb 03 00:00:00 CET 2012Mathematical and Computer Modelling3-4770-778Common fixed point theorems in fuzzy metric spaces employing common property (E.A.).552012dblp http://www.bibsonomy.org/bibtex/26c9e5a23dc537394f0a19e624fbb105c/dblpdblp2012-02-03T00:00:00+01:00dblp <span class="authorEditorList"><a href="/author/Dalip">Daniel Hasan Dalip</a>, <a href="/author/Gonçalves">Marcos André Gonçalves</a>, <a href="/author/Cristo">Marco Cristo</a>, and <a href="/author/Calado">Pável Calado</a> </span><em>J. Data and Information Quality</em> <em>2(3):14</em> (<em>2011</em>)Fri Feb 03 00:00:00 CET 2012J. Data and Information Quality314Automatic Assessment of Document Quality in Web Collaborative Digital Libraries.22011dblp http://www.bibsonomy.org/bibtex/27bc4d0f65b8e7d52342979f5d5f76f9f/dblpdblp2012-02-03T00:00:00+01:00dblp <span class="authorEditorList"><a href="/author/Ansari">Qamrul Hasan Ansari</a>, and <a href="/author/Rezaei">Mahboubeh Rezaei</a> </span><em>Optimization Letters</em> <em>6(2):241-251</em> (<em>2012</em>)Fri Feb 03 00:00:00 CET 2012Optimization Letters2241-251Generalized pseudolinearity.62012dblp http://www.bibsonomy.org/bibtex/2857fb86f37151f71d755c9d15bab6dde/dblpdblp2012-02-03T00:00:00+01:00dblp <span class="authorEditorList"><a href="/author/Hasan">Taha Mohammed Hasan</a>, and <a href="/author/Wu">Xiangqian Wu</a> </span><em>Journal of Multimedia</em> <em>6(6):477-485</em> (<em>2011</em>)Fri Feb 03 00:00:00 CET 2012Journal of Multimedia6477-485An Adaptive Algorithm for Improving the Fractal Image Compression (FIC).62011dblp http://www.bibsonomy.org/bibtex/260a3fc0c82359bfecbe223d61276beea/dblpdblp2012-02-01T00:00:00+01:00dblp <span class="authorEditorList"><a href="/author/Hasan">Syed Faraz Hasan</a>, <a href="/author/Siddique">Nazmul Haque Siddique</a>, and <a href="/author/Chakraborty">Shyam S. Chakraborty</a> </span><em>IEEE Communications Letters</em> <em>14(9):818-820</em> (<em>2010</em>)Wed Feb 01 00:00:00 CET 2012IEEE Communications Letters9818-820On the Effectiveness of WISPr in Roadside-to-Vehicle Communications.142010dblp http://www.bibsonomy.org/bibtex/2b71fbc20a326e8e546714b9d3a378452/dblpdblp2012-02-01T00:00:00+01:00dblp <span class="authorEditorList"><a href="/author/Hasan">Mohammed A. Hasan</a>, and <a href="/author/Azimi-Sadjadi">Mahmood R. Azimi-Sadjadi</a> </span><em>IEEE Transactions on Signal Processing</em> <em>44(9):2172-2185</em> (<em>1996</em>)Wed Feb 01 00:00:00 CET 2012IEEE Transactions on Signal Processing92172-2185A modified block FTF adaptive algorithm with applications to underwater target detection.441996dblp http://www.bibsonomy.org/bibtex/2b3f0af0992e2d76e4abea7c256ee9dde/dblpdblp2012-02-01T00:00:00+01:00dblp <span class="authorEditorList"><a href="/author/Hossain">Md. Sazzad Hossain</a>, <a href="/author/Rakib">Md. Rashedul Hasan Rakib</a>, <a href="/author/Rahman">Md. Motiur Rahman</a>, <a href="/author/Hossain">A. S. M. Delowar Hossain</a>, and <a href="/author/Hasan">Md. Minul Hasan</a> </span><em>CoRR</em> (<em>2012</em>)Wed Feb 01 00:00:00 CET 2012CoRRA New Design Technique of Reversible BCD Adder Based on NMOS With Pass Transistor Gatesabs/1201.24732012dblp http://www.bibsonomy.org/bibtex/293231294b1243034ebb4c0e292dec6cd/dblpdblp2012-02-01T00:00:00+01:00dblp <span class="authorEditorList"><a href="/author/Hasan">K. M. Azharul Hasan</a>, <a href="/author/Al-Mahmud"> Al-Mahmud</a>, <a href="/author/Mondal">Amit Mondal</a>, and <a href="/author/Saha">Amit Saha</a> </span><em>CoRR</em> (<em>2012</em>)Wed Feb 01 00:00:00 CET 2012CoRRRecognizing Bangla Grammar using Predictive Parserabs/1201.20102012dblp http://www.bibsonomy.org/bibtex/2e6c61af0e81c6039e807ce655a388788/dblpdblp2012-02-01T00:00:00+01:00dblp <span class="authorEditorList"><a href="/author/McKinley">Philip K. McKinley</a>, <a href="/author/Hasan">Nany Hasan</a>, <a href="/author/Libeskind-Hadas">Ran Libeskind-Hadas</a>, and <a href="/author/Liu">C. L. Liu</a> </span><em>SIAM J. Discrete Math.</em> <em>4(2):281-292</em> (<em>1991</em>)Wed Feb 01 00:00:00 CET 2012SIAM J. Discrete Math.2281-292Disjoint Covers in Replicated Heterogeneous Arrays.41991dblp http://www.bibsonomy.org/bibtex/2be0f20ef678ebfb0d47a53b0218bcde9/dblpdblp2012-01-31T00:00:00+01:00dblp <span class="authorEditorList"><a href="/author/Hasan">Nany Hasan</a>, and <a href="/author/Liu">C. L. Liu</a> </span><em>FTCS, </em><em>page 166-173. </em><em>IEEE Computer Society, </em>(<em>1990</em>)Tue Jan 31 00:00:00 CET 2012FTCSconf/ftcs/1990166-173Fault covers in reconfigurable PLAs.1990dblp http://www.bibsonomy.org/bibtex/25bdf9b981748ca28f66f50776457be5a/dblpdblp2012-01-30T00:00:00+01:00dblp <span class="authorEditorList"><a href="/author/Shahbazpanahi">Shahram Shahbazpanahi</a>, <a href="/author/Valaee">Shahrokh Valaee</a>, and <a href="/author/Bastani">Mohammad Hasan Bastani</a> </span><em>IEEE Transactions on Signal Processing</em> <em>49(10):2169-2178</em> (<em>2001</em>)Mon Jan 30 00:00:00 CET 2012IEEE Transactions on Signal Processing102169-2178Distributed source localization using ESPRIT algorithm.492001dblp