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Post-Route Refinement for High-Frequency PCBs Considering Meander Segment Alleviation., , , and . CoRR, (2017)Autonomous vehicle routing in multiple intersections., and . ASP-DAC, page 585-590. ACM, (2019)Load-balanced clock tree synthesis with adjustable delay buffer insertion for clock skew reduction in multiple dynamic supply voltage designs., , , and . ACM Trans. Design Autom. Electr. Syst., 17 (3): 34:1-34:22 (2012)Reliability-aware synthesis for flow-based microfluidic biochips by dynamic-device mapping., , , and . DAC, page 141:1-141:6. ACM, (2015)Timing-aware clock gating of pulsed-latch circuits for low power design., and . VLSI-DAT, page 1-4. IEEE, (2013)A nonlinear optimization methodology for resistor matching in analog integrated circuits., , and . VLSI-DAT, page 1-4. IEEE, (2012)Triangle-based process hotspot classification with dummification in EUVL., , , and . VLSI-DAT, page 1-4. IEEE, (2014)Bus-driven floorplanning with bus pin assignment and deviation minimization., and . Integr., 45 (4): 405-426 (2012)Guest Editors' Introduction: Microfluidics: Design and Test Solutions for Enabling Biochemistry on a Chip., and . IEEE Des. Test, 32 (6): 6-7 (2015)Storage and Caching: Synthesis of Flow-Based Microfluidic Biochips., , , and . IEEE Des. Test, 32 (6): 69-75 (2015)