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Improved Reliability of FPGA-Based PUF Identification Generator Design.

, , and . ACM Trans. Reconfigurable Technol. Syst., 10 (3): 20:1-20:23 (2017)

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Optimized Schoolbook Polynomial Multiplication for Compact Lattice-Based Cryptography on FPGA., , , , and . IEEE Trans. Very Large Scale Integr. Syst., 27 (10): 2459-2463 (2019)Guest Editorial: Introduction to the Special Issue on Emerging Technologies and Designs for Application-Specific Computing., , and . IEEE Trans. Emerg. Top. Comput., 5 (2): 148-150 (2017)Deep Learning-Based Hardware Trojan Detection With Block-Based Netlist Information Extraction., , , and . IEEE Trans. Emerg. Top. Comput., 10 (4): 1837-1853 (2022)Addressing Side-Channel Vulnerabilities in the Discrete Ziggurat Sampler., , , and . SPACE, volume 11348 of Lecture Notes in Computer Science, page 65-84. Springer, (2018)Novel lightweight FF-APUF design for FPGA., , , and . SoCC, page 75-80. IEEE, (2016)Compact and provably secure lattice-based signatures in hardware., , , and . ISCAS, page 1-4. IEEE, (2017)Evaluation of Random Delay Insertion against DPA on FPGAs., , and . ACM Trans. Reconfigurable Technol. Syst., 4 (1): 11:1-11:20 (2010)Introduction for Embedded Platforms for Cryptography in the Coming Decade., , and . ACM Trans. Embed. Comput. Syst., 14 (3): 40:1-40:3 (2015)A Theoretical Model to Link Uniqueness and Min-Entropy for PUF Evaluations., , , , and . IEEE Trans. Computers, 68 (2): 287-293 (2019)Security in Approximate Computing and Approximate Computing for Security: Challenges and Opportunities., , , , , and . Proc. IEEE, 108 (12): 2214-2231 (2020)