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Disambiguation of "Siek, Liter"

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A high efficiency synchronous buck converter with adaptive dead-time control.

, , and . ISIC, page 1-4. IEEE, (2016)

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Vladas Literskis

Georg Literski

Karlheinz Siek

Karlheinz Siek

Karlheinz Siek

 

Other publications of authors with the same name

A Low-Noise Multi-GHz CMOS Multiloop Ring Oscillator With Coarse and Fine Frequency Tuning., , , , and . IEEE Trans. Very Large Scale Integr. Syst., 17 (4): 571-577 (2009)A Hysteretic Switched-Capacitor DC-DC Converter With Optimal Output Ripple and Fast Transient Response., , and . IEEE Trans. Very Large Scale Integr. Syst., 25 (11): 2995-3005 (2017)A 0.9-V input PWM DCM boost converter with low output ripples and fast load transient response based on a novel square-root voltage mode (SRVM) control approach., and . ISCAS, page 1-4. IEEE, (2017)A Fixed-frequency hysteretic controlled buck DC-DC converter with improved load regulation., , , and . ISCAS, page 954-957. IEEE, (2014)Triple boundary multiphase with predictive interleaving technique for switched capacitor DC-DC converter regulation., , and . ISIC, page 17-20. IEEE, (2014)Performance analysis on active rectifier structures for inductively powered application., , and . ISIC, page 1-4. IEEE, (2016)A TDC-less all-digital phase locked loop for medical implant applications., and . Microprocess. Microsystems, (2019)A 0.42-V Input Boost dc-dc Converter With Pseudo-Digital Pulsewidth Modulation., , , , and . IEEE Trans. Circuits Syst. II Express Briefs, 61-II (8): 634-638 (2014)A Compact Current Mode Neuron Circuit with Gaussian Taper Learning Capability., , and . ISCAS, page 2129-2132. IEEE, (2009)A 1 V 103 dB 3rd-Order Audio Continuous-Time ΔΣ ADC With Enhanced Noise Shaping in 65 nm CMOS., , , and . IEEE J. Solid State Circuits, 51 (11): 2625-2638 (2016)