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Minimum Register Instruction Sequencing to Reduce Register Spills in Out-of-Order Issue Superscalar Architectures., , , , and . IEEE Trans. Computers, 52 (1): 4-20 (2003)Towards an Efficient Hybrid Dataflow Architecture Model., , and . PARLE (1), volume 505 of Lecture Notes in Computer Science, page 355-371. Springer, (1991)Computing phi-nodes in linear time using DJ graphs., and . J. Program. Lang., (1995)Multithreaded algorithms for the fast Fourier transform., , , and . SPAA, page 176-185. ACM, (2000)A New Framework for Elimination-Based Data Flow Analysis Using DJ Graphs., , and . ACM Trans. Program. Lang. Syst., 20 (2): 388-435 (1998)Minimizing communication in rate-optimal software pipelining for stream programs., , , and . CGO, page 210-217. ACM, (2010)Mapping the LU decomposition on a many-core architecture: challenges and solutions., and . Conf. Computing Frontiers, page 71-80. ACM, (2009)Performance of Interconnection Network in Multithreaded Architectures., , , and . PARLE, volume 817 of Lecture Notes in Computer Science, page 823-826. Springer, (1994)Self-Avoiding Walks over Adaptive Unstructured Grids., , and . Concurr. Pract. Exp., 12 (2-3): 85-109 (2000)Data locality sensitivity of multithreaded computations on a distributed-memory multiprocessor., , , and . CASCON, page 37. IBM, (1996)