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Prioritized access in CSMA networks: a node partitioning approach.

, and . LCN, page 275-280. IEEE Computer Society, (1988)

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Evaluation ot Monitor Complexity for Concurrently Testing Microprogrammed Control Units., and . ITC, page 733-736. IEEE Computer Society, (1985)Locally clocked microprocessor., and . Great Lakes Symposium on VLSI, page 47-51. IEEE, (1993)Bit-Splitting for Testability Enhancement in Scan-Based Design., and . ICCD, page 155-158. IEEE Computer Society, (1993)Efficient testability enhancement for combinational circuit., and . ICCD, page 168-179. IEEE Computer Society, (1995)Automatic Design of Exhaustively Self-Testing Chips with Bilbo Modules., and . ITC, page 362-371. IEEE Computer Society, (1985)Design of Robust-Path-Delay-Fault-Testable Combinational Circuits by Boolean Space Expansion., , and . ICCD, page 482-485. IEEE Computer Society, (1992)Random Testability of Redundant Circuits., and . ICCD, page 424-427. IEEE Computer Society, (1991)Prioritized access in CSMA networks: a node partitioning approach., and . LCN, page 275-280. IEEE Computer Society, (1988)Extended hyperbolic congruential frequency hop code: generation and bounds for cross- and auto-ambiguity function., , and . IEEE Trans. Commun., 44 (3): 301-305 (1996)Low power design using double edge triggered flip-flops., , and . IEEE Trans. Very Large Scale Integr. Syst., 2 (2): 261-265 (1994)