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Disambiguation of "Chang, Yao-Wen"

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Minimum-implant-area-aware detailed placement with spacing constraints.

, , and . DAC, page 84:1-84:6. ACM, (2016)

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Chang Yao

Hyi-yao Chang

Tsen-Yao Chang

Chi-Yao Chang

Kuo-Wen Chang

 

Other publications of authors with the same name

ILP-Based Pin-Count Aware Design Methodology for Microfluidic Biochips., and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 29 (9): 1315-1327 (2010)Simultaneous Layout Migration and Decomposition for Double Patterning Technology., , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 30 (2): 284-294 (2011)Generic ILP-based approaches for time-multiplexed FPGA partitioning., , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 20 (10): 1266-1274 (2001)Cut Redistribution With Directed-Self-Assembly Templates for Advanced 1-D Gridded Layouts., and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 36 (12): 2066-2079 (2017)A Novel Wire-Density-Driven Full-Chip Routing System for CMP Variation Control., , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 28 (2): 193-206 (2009)Cross-Contamination Aware Design Methodology for Pin-Constrained Digital Microfluidic Biochips., and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 30 (6): 817-828 (2011)Voltage-Island Partitioning and Floorplanning Under Timing Constraints., , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 28 (5): 690-702 (2009)Area-I/O Flip-Chip Routing for Chip-Package Co-Design Considering Signal Skews., and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 29 (5): 711-721 (2010)Timing ECO Optimization Via Bézier Curve Smoothing and Fixability Identification., , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 31 (12): 1857-1866 (2012)Effective Wire Models for X-Architecture Placement., , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 27 (4): 654-658 (2008)