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Hardware thread reordering to boost OpenCL throughput on FPGAs.

, , , and . ICCD, page 257-264. IEEE Computer Society, (2016)

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A parallel clustering algorithm for placement., , and . ISQED, page 349-356. IEEE, (2014)Bridging Architecture and Programming for Throughput-Oriented Vision Processing (Abstract Only)., , , and . FPGA, page 275. ACM, (2015)Engaging sophomores in embedded design using robotics., , , , , and . WCAE, page 9:1-9:6. ACM, (2015)Hardware thread reordering to boost OpenCL throughput on FPGAs., , , and . ICCD, page 257-264. IEEE Computer Society, (2016)Exploring the Efficiency of the OpenCL Pipe Semantic on an FPGA., , , , and . SIGARCH Comput. Archit. News, 43 (4): 52-57 (2015)Two novel ultra high speed carbon nanotube Full-Adder cells., , , and . IEICE Electron. Express, 6 (19): 1395-1401 (2009)Design and Analysis of Approximate Compressors for Multiplication., , , and . IEEE Trans. Computers, 64 (4): 984-994 (2015)NUPAR: A Benchmark Suite for Modern GPU Architectures., , , , , , , , , and . ICPE, page 253-264. ACM, (2015)Ultra High Speed CNFET Full-Adder Cell Based on Majority Gates., , , and . IEICE Trans. Electron., 93-C (6): 932-934 (2010)Hardware design of a new genetic based disk scheduling method., , , , and . Real Time Syst., 47 (1): 41-71 (2011)