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An efficient balanced truncation realization algorithm for interconnect model order reduction.

D. Zhou, W. Li, W. Cai, and N. Guo. ISCAS (5), page 383-386. IEEE, (2001)

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Dian Handayani

Zhou Zhou

Mahmud Dianati

Nadja Diane

Marco Alberto Diana

Other publications of authors with the same name

Optimization and Quality Estimation of Circuit Design via Random Region Covering Method.Z. Bi, D. Zhou, S. Wang, and X. Zeng. ACM Trans. Design Autom. Electr. Syst., 23 (1): 1:1-1:25 (2017)LVS verification across multiple power domains for a quad-core microprocessor.W. Li, D. Blakely, S. Sooy, K. Dunn, D. Kidd, R. Rogenmoser, and D. Zhou. ACM Trans. Design Autom. Electr. Syst., 11 (2): 490-500 (2006)Correlated Rare Failure Analysis via Asymptotic Probability Evaluation.J. Tao, H. Yu, D. Zhou, Y. Su, X. Zeng, and X. Li. DAC, page 54:1-54:6. ACM, (2017)Batch Bayesian Optimization via Multi-objective Acquisition Ensemble for Automated Analog Circuit Design.W. Lyu, F. Yang, C. Yan, D. Zhou, and X. Zeng. ICML, volume 80 of Proceedings of Machine Learning Research, page 3312-3320. PMLR, (2018)Worst case analysis for evaluating VLSI circuit performance bounds using an optimization method.S. Saibua, L. Qian, and D. Zhou. VLSI-SoC, page 102-105. IEEE, (2011)An efficient leakage-aware thermal simulation approach for 3D-ICs using corrected linearized model and algebraic multigrid.C. Yan, H. Zhu, D. Zhou, and X. Zeng. DATE, page 1207-1212. IEEE, (2017)A DSP-based turbo codec for 3G communication systems.Y. Jiang, Y. Tang, Y. Wang, and D. Zhou. ICASSP, page 2685-2688. IEEE, (2002)Projection based Active Gaussian Process Regression for Pareto Front Modeling.Z. Gao, J. Tao, Y. Su, D. Zhou, and X. Zeng. CoRR, (2020)An Efficient Bayesian Optimization Approach for Automated Optimization of Analog Circuits.W. Lyu, P. Xue, F. Yang, C. Yan, Z. Hong, X. Zeng, and D. Zhou. IEEE Trans. Circuits Syst. I Regul. Pap., 65-I (6): 1954-1967 (2018)An Efficient Bayesian Optimization Approach for Analog Circuit Synthesis via Sparse Gaussian Process Modeling.B. He, S. Zhang, F. Yang, C. Yan, D. Zhou, and X. Zeng. DATE, page 67-72. IEEE, (2020)

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Disambiguation of "Zhou, Dian"

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URL
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An efficient balanced truncation realization algorithm for interconnect model order reduction.

Please choose a person to relate this publication to

Dian Handayani

Zhou Zhou

Mahmud Dianati

Nadja Diane

Marco Alberto Diana

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Zhou, Dian"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML An efficient balanced truncation realization algorithm for interconnect model order reduction.

Please choose a person to relate this publication to

Dian Handayani

Zhou Zhou

Mahmud Dianati

Nadja Diane

Marco Alberto Diana

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

An efficient balanced truncation realization algorithm for interconnect model order reduction.