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Disambiguation of "Sasaki, Takahiko"

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A 130.7mm2 2-layer 32Gb ReRAM memory device in 24nm technology.

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Mei Sasaki

Manami Sasaki

Chiyoko Sasaki

Felix Sasaki

 

Other publications of authors with the same name

A 130.7mm2 2-layer 32Gb ReRAM memory device in 24nm technology., , , , , , , , , and 37 other author(s). ISSCC, page 210-211. IEEE, (2013)A 0.7 V Single-Supply SRAM With 0.495 µm2 Cell in 65 nm Technology Utilizing Self-Write-Back Sense Amplifier and Cascaded Bit Line Scheme., , , , , , , , , and . IEEE J. Solid State Circuits, 44 (4): 1192-1198 (2009)A 130.7-mm2 2-Layer 32-Gb ReRAM Memory Device in 24-nm Technology., , , , , , , , , and 26 other author(s). IEEE J. Solid State Circuits, 49 (1): 140-153 (2014)A Single-Power-Supply 0.7V 1GHz 45nm SRAM with An Asymmetrical Unit-×-ratio Memory Cell., , , , , , , , , and 1 other author(s). ISSCC, page 382-383. IEEE, (2008)A configurable SRAM with constant-negative-level write buffer for low-voltage operation with 0.149µm2 cell in 32nm high-k metal-gate CMOS., , , , , , , , , and 1 other author(s). ISSCC, page 348-349. IEEE, (2010)A process-variation-tolerant dual-power-supply SRAM with 0.179µm2 Cell in 40nm CMOS using level-programmable wordline driver., , , , , , , , , and 3 other author(s). ISSCC, page 458-459. IEEE, (2009)Direct Cell-Stability Test Techniques for an SRAM Macro with Asymmetric Cell-Bias-Voltage Modulation., , , , , , and . ITC, page 1-7. IEEE Computer Society, (2008)