Author of the publication

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

A 16Gb 3b/ Cell NAND Flash Memory in 56nm with 8MB/s Write Rate., , , , , , , , , and 38 other author(s). ISSCC, page 506-507. IEEE, (2008)A 34 MB/s MLC Write Throughput 16 Gb NAND With All Bit Line Architecture on 56 nm Technology., , , , , , , , , and 33 other author(s). IEEE J. Solid State Circuits, 44 (1): 186-194 (2009)A 120mm2 16Gb 4-MLC NAND Flash Memory with 43nm CMOS Technology., , , , , , , , , and 27 other author(s). ISSCC, page 430-431. IEEE, (2008)A 151mm2 64Gb MLC NAND flash memory in 24nm CMOS technology., , , , , , , , , and 32 other author(s). ISSCC, page 198-199. IEEE, (2011)A 130.7mm2 2-layer 32Gb ReRAM memory device in 24nm technology., , , , , , , , , and 37 other author(s). ISSCC, page 210-211. IEEE, (2013)A 151-mm2 64-Gb 2 Bit/Cell NAND Flash Memory in 24-nm CMOS Technology., , , , , , , , , and 32 other author(s). IEEE J. Solid State Circuits, 47 (1): 75-84 (2012)A 34MB/s-Program-Throughput 16Gb MLC NAND with All-Bitline Architecture in 56nm., , , , , , , , , and 33 other author(s). ISSCC, page 420-421. IEEE, (2008)A 56-nm CMOS 99-mm2 8-Gb Multi-Level NAND Flash Memory With 10-MB/s Program Throughput., , , , , , , , , and 25 other author(s). IEEE J. Solid State Circuits, 42 (1): 219-232 (2007)A 16 Gb 3-Bit Per Cell (X3) NAND Flash Memory on 56 nm Technology With 8 MB/s Write Rate., , , , , , , , , and 38 other author(s). IEEE J. Solid State Circuits, 44 (1): 195-207 (2009)A 5.6MB/s 64Gb 4b/Cell NAND Flash memory in 43nm CMOS., , , , , , , , , and 47 other author(s). ISSCC, page 246-247. IEEE, (2009)