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Low Standby Power Capacitively Coupled Sense Amplifier for wide voltage range operation of dual rail SRAMs.

, , , , , , , , and . ICICDT, page 1-4. IEEE, (2015)

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Comparison of SRAM Cell Layout Topologies to Estimate Improvement in SER Robustness in 28FDSOI and 40 nm Technologies., and . VDAT, volume 711 of Communications in Computer and Information Science, page 414-420. Springer, (2017)Low Standby Power Capacitively Coupled Sense Amplifier for wide voltage range operation of dual rail SRAMs., , , , , , , , and . ICICDT, page 1-4. IEEE, (2015)Design of Sense Amplifier for Wide Voltage Range Operation of Split Supply Memories in 22nm HKMG CMOS Technology., , and . VLSID, page 37-42. IEEE, (2020)A Sense Amplifier Based Bulk Built-In Current Sensor for Detecting Laser-Induced Currents., , , and . VLSID, page 69-74. IEEE, (2023)A Common Mode Insensitive Process Tolerant Sense Amplifier Design for In Memory Compute Applications in 65nm LSTP Technology., , and . VLSID, page 121-126. IEEE, (2023)Reduced March iC- Test for Detecting Ageing Induced Faults in Memory Address Decoders., , and . VLSID, page 193-198. IEEE, (2021)Diagnostic Circuit for Latent Fault Detection in SRAM Row Decoder., , , and . ISQED, page 395-400. IEEE, (2020)Area compact 5T portless SRAM cell for high density cache in 65nm CMOS., , , and . VDAT, page 1-4. IEEE Computer Society, (2015)Floorplan and congestion aware framework for optimal SRAM selection for memory subsystems., , , and . SoCC, page 105-110. IEEE, (2015)A 81nW Error Amplifier Design for Ultra Low Leakage Retention Mode Operation of 4Mb SRAM Array in 40nm LSTP Technology., and . SoCC, page 203-208. IEEE, (2018)