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Erratum to: Modeling Universal Instruction Selection.

, , , and . CP, volume 9255 of Lecture Notes in Computer Science, Springer, (2015)

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Parallelizing Parallel Programs: A Dynamic Pattern Analysis for Modernization of Legacy Parallel Code., , and . PACT, page 347-348. ACM, (2020)Survey on Combinatorial Register Allocation and Instruction Scheduling., and . ACM Comput. Surv., 52 (3): 62:1-62:50 (2019)Constraint-Based Software Diversification for Efficient Mitigation of Code-Reuse Attacks., , and . CP, volume 12333 of Lecture Notes in Computer Science, page 791-808. Springer, (2020)Combinatorial Register Allocation and Instruction Scheduling., , , and . ACM Trans. Program. Lang. Syst., 41 (3): 17:1-17:53 (2019)Securing Optimized Code Against Power Side Channels., , , and . CoRR, (2022)Modernizing parallel code with pattern analysis., , and . PPoPP, page 418-430. ACM, (2021)A Hybrid Approach to Parallel Pattern Discovery in C++., , , , , , , , , and . PDP, page 187-191. IEEE, (2020)Constraint-based Diversification of JOP Gadgets., , and . CoRR, (2021)Constraint-Based Register Allocation and Instruction Scheduling.. Royal Institute of Technology, Stockholm, Sweden, (2018)base-search.net (ftkthstockholm:oai:DiVA.org:kth-232192).Securing Optimized Code Against Power Side Channels., , , and . CSF, page 340-355. IEEE, (2023)