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A new hybrid FPGA with nanoscale clusters and CMOS routing., and . DAC, page 727-730. ACM, (2006)Evaluating area and performance of hybrid FPGAs with nanoscale clusters and CMOS routing., and . JETC, 3 (3): 15 (2007)Detection of trojans using a combined ring oscillator network and off-chip transient power analysis., , and . JETC, 9 (3): 25:1-25:20 (2013)TSUNAMI: a light-weight on-chip structure for measuring timing uncertainty induced by noise during functional and test operations., and . ACM Great Lakes Symposium on VLSI, page 183-188. ACM, (2012)Case Study: Efficient SDD test generation for very large integrated circuits., , , , and . VTS, page 78-83. IEEE Computer Society, (2011)Improving Transition Delay Test Using a Hybrid Method., and . IEEE Des. Test Comput., 23 (5): 402-412 (2006)Ensuring Power-Safe Application of Test Patterns Using an Effective Gating Approach Considering Current Limits., , and . J. Low Power Electron., 8 (2): 235-247 (2012)A Comprehensive Analysis of Transition Fault Coverage and Test Power Dissipation for Launch-Off-Shift and Launch-Off-Capture Schemes., , , , , , , , and . J. Low Power Electron., 6 (2): 359-374 (2010)Trustworthy Hardware: Identifying and Classifying Hardware Trojans., , , and . Computer, 43 (10): 39-46 (2010)Built-In Self-Test and Recovery Procedures for Molecular Electronics-Based Nanofabrics., and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 26 (5): 943-958 (2007)