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Disambiguation of "Kajitani, Yoji"

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Module packing based on the BSG-structure and IC layout applications.

, , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 17 (6): 519-530 (1998)

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Yoji Ito

 

Other publications of authors with the same name

Module Placement on BSG-Structure with Pre-Placed Modules and Rectilinear Modules., , and . ASP-DAC, page 571-576. IEEE, (1998)Equidistance routing in high-speed VLSI layout design., , , and . Integr., 38 (3): 439-449 (2005)Module packing based on the BSG-structure and IC layout applications., , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 17 (6): 519-530 (1998)VLSI module placement based on rectangle-packing by the sequence-pair., , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 15 (12): 1518-1524 (1996)Order of Channels for Safe Routing and Optimal Compaction of Routing Area.. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2 (4): 293-300 (1983)Floorplan and Placement.. Encyclopedia of Algorithms, Springer, (2008)The Oct-Touched Tile: A New Architecture for Shape-Based Routing., , , and . IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 89-A (2): 448-455 (2006)A Performance-Driven Circuit Bipartitioning Method Considering Time-Multiplexed I/Os., , , and . IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 90-A (5): 924-931 (2007)A matroid generalization of theorems of Lewin and Gallai., and . Discret. Appl. Math., 9 (2): 213-216 (1984)Adaptive Porting of Analog IPs with Reusable Conservative Properties., , , , , and . ISVLSI, page 18-23. IEEE Computer Society, (2006)