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A 14 bit self-calibrating charge redistribution SAR ADC., , , , and . ISCAS, page 1038-1041. IEEE, (2012)Neighborhood Rank Order Coding for Robust Texture Analysis and Feature Extraction., and . CoRR, (2014)OTA based 200 GΩ resistance on 700 μm2 in 180 nm CMOS for neuromorphic applications., , , , , and . CoRR, (2014)Robust Implementation and Statistical Modeling of a VI-Converter., and . SBCCI, page 83-88. IEEE Computer Society, (2000)A low-power cell-based-design multi-port register file in 65nm CMOS technology., , , and . ISCAS, page 313-316. IEEE, (2010)Hybrid incremental-ΣΔ-ADC for ambient light sensing applications., , , , , and . ISCAS, page 1256-1259. IEEE, (2013)A novel ADPLL design using successive approximation frequency control., , , , and . Microelectron. J., 40 (11): 1613-1622 (2009)Design and evaluation of current-mode image sensors in CMOS-technology., , and . IEEE Trans. Circuits Syst. II Express Briefs, 51-II (10): 566-570 (2004)Rapid prototyping of higher order incremental ΣΔ-ADC topologies and NTFs., , , , , and . ICECS, page 561-564. IEEE, (2013)Pulse coupled neural networks with adaptive synapses for image segmentation., , , , and . ARCS Workshops, volume P-41 of LNI, page 275-282. GI, (2004)