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Disambiguation of "Quan, Shaolei"

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A power-optimized 64-bit priority encoder utilizing parallel priority look-ahead.

, , and . ISCAS (2), page 753-756. IEEE, (2004)

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Quan Qiu

Quan Liang

Wei Quan

Quan Yuan

Zhongxian Quan

 

Other publications of authors with the same name

A novel reconfigurable architecture of low-power unsigned multiplier for digital signal processing., , and . ISCAS (4), page 3327-3330. IEEE, (2005)Design of a CMOS Operational Amplifier Amenable to Extreme Voltage Stress., , and . DFT, page 563-572. IEEE Computer Society, (2005)A power-optimized 64-bit priority encoder utilizing parallel priority look-ahead., , and . ISCAS (2), page 753-756. IEEE, (2004)A 1.0625 ~ 14.025 Gb/s Multi-Media Transceiver With Full-Rate Source-Series-Terminated Transmit Driver and Floating-Tap Decision-Feedback Equalizer in 40 nm CMOS., , , , , , , , , and 15 other author(s). IEEE J. Solid State Circuits, 46 (12): 3126-3139 (2011)Design of a CMOS Operational Amplifier for Extreme-Voltage Stress Test., , and . Asian Test Symposium, page 70-75. IEEE Computer Society, (2005)Design of Reliable CMOS Phase-Locked Loops., , and . ICECS, page 371-374. IEEE, (2006)A noise optimization technique for codesign of CMOS radio-frequency low noise amplifiers and low-quality spiral inductors., and . ACM Great Lakes Symposium on VLSI, page 178-182. ACM, (2004)A 1.0625-to-14.025Gb/s multimedia transceiver with full-rate source-series-terminated transmit driver and floating-tap decision-feedback equalizer in 40nm CMOS., , , , , , , , , and 15 other author(s). ISSCC, page 348-350. IEEE, (2011)Reliability enhancement of CMOS SRAMs., , and . MTDT, page 146-151. IEEE Computer Society, (2005)