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Disambiguation of "Dharchoudhury, Abhijit"

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iCET: A Complete Chip-Level Thermal Reliability Diagnosis Tool for CMOS VLSI Chips.

, , , , and . DAC, page 548-551. ACM Press, (1996)

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Abhijit Basu

Abhijit Majumdar

Abhijit Bose

Abhijit Basu

Abhijit Ghose

 

Other publications of authors with the same name

Design and Analysis of Power Distribution Networks in PowerPC Microprocessors., , , , , and . DAC, page 738-743. ACM Press, (1998)Emerging power management tools for processor design., , , , , and . ISLPED, page 143-148. ACM, (1998)Migration: A New Technique to Improve Synthesized Designs Through Incremental Customization., , , , and . DAC, page 388-391. ACM Press, (1998)An Integrated Approach to Realistic Worst-Case Design Optimization of MOS Analog Circuits., and . DAC, page 704-709. IEEE Computer Society Press, (1992)CMOS Combinational Circuit Sizing by Stage-wise Tapering., , , and . DATE, page 985-986. IEEE Computer Society, (1998)iCET: A Complete Chip-Level Thermal Reliability Diagnosis Tool for CMOS VLSI Chips., , , , and . DAC, page 548-551. ACM Press, (1996)A Three-Tier Assertion Technique for Spice Verification of Transistor Level Timing Analysis., , and . VLSI Design, page 175-180. IEEE Computer Society, (1999)Fast and accurate timing simulation with regionwise quadratic models of MOS I-V characteristics., , , and . ICCAD, page 190-194. IEEE Computer Society / ACM, (1994)Worst-case analysis and optimization of VLSI circuit performances., and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 14 (4): 481-492 (1995)Library-less synthesis for static CMOS combinational logic circuits., , , , , , , and . ICCAD, page 658-662. IEEE Computer Society / ACM, (1997)