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Time and energy efficient mapping of embedded applications onto NoCs.

, , , , and . ASP-DAC, page 33-38. ACM Press, (2005)

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Automatic generation of neural networks for image processing., , and . ISCAS, IEEE, (2006)Gradient pile up for edge detection on hardware., , , and . ISCAS (6), page 5834-5837. IEEE, (2005)Run-Time Resources Management on Coarse Grained, Packet-Switching Reconfigurable Architecture: A Case Study Through the APACHES' Platform., , , , , and . ARC, volume 3985 of Lecture Notes in Computer Science, page 134-145. Springer, (2006)CAFES: A framework for intrachip application modeling and communication architecture design., , , , , and . J. Parallel Distributed Comput., 71 (5): 714-728 (2011)A Framework for Automatic Recognition of Cell Damage on Microscopic Images using Artificial Neural Networks., , , , , and . EMBC, page 636-639. IEEE, (2018)High-Throughput Hardware for 3D-HEVC Depth-Map Intra Prediction., , , , , , , , and . IEEE Des. Test, 37 (3): 7-14 (2020)A new march sequence to fit DDR SDRAM test in burst mode., , and . SBCCI, page 28-33. ACM, (2008)Noise Figure Evaluation Using Low Cost BIST, , and . CoRR, (2007)Quality Assessment of Non-Rigid Registration Methods for Atlas-Based Segmentation in Head-Neck Radiotherapy., , , , and . ICASSP (1), page 445-448. IEEE, (2007)NoC Power Optimization Using a Reconfigurable Router., , , , , and . ISVLSI, page 235-240. IEEE Computer Society, (2009)