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Design considerations of synaptic device for neuromorphic computing., , and . ISCAS, page 1062-1065. IEEE, (2014)Device and System Level Design Considerations for Analog-Non-Volatile-Memory Based Neuromorphic Architectures., , , and . CoRR, (2015)Drift-enhanced Unsupervised Learning with PCM Synapses., , , and . DRC, page 1-2. IEEE, (2018)Experimental Demonstration of Array-level Learning with Phase Change Synaptic Devices., , , , , , and . CoRR, (2014)Hippocampal-Cortical Memory Trace Transfer and Reactivation Through Cell-Specific Stimulus and Spontaneous Background Noise., and . Frontiers Comput. Neurosci., (2019)Graphene neural interfaces for artifact free optogenetics., , , , and . EMBC, page 4204-4207. IEEE, (2016)Phase Change Memory: Scaling and applications., , , , and . CICC, page 1-7. IEEE, (2012)Integration of Ag-CBRAM crossbars and Mott ReLU neurons for efficient implementation of deep neural networks in hardware., , , , , , and . Neuromorph. Comput. Eng., 3 (3): 34007 (September 2023)Investigation of Propagating Cortical Waves and Spirals Recorded by High Density Porous Graphene Arrays., , and . EMBC, page 995-998. IEEE, (2018)Multi-level, Forming Free, Bulk Switching Trilayer RRAM for Neuromorphic Computing at the Edge., , , , , , , , , and 2 other author(s). CoRR, (2023)