Author of the publication

Early Scenario Pruning for Efficient Design Space Exploration in Physical Synthesis.

, , , and . VLSID, page 116-121. IEEE Computer Society, (2016)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

Research From the IEEE IBM AI Compute and Emerging Technology Symposia., , , and . IEEE J. Emerg. Sel. Topics Circuits Syst., 9 (3): 435-438 (2019)Large-signal two-terminal device model for nanoelectronic circuit analysis., , and . IEEE Trans. Very Large Scale Integr. Syst., 12 (11): 1201-1208 (2004)A New Methodology for Power-Aware Transistor Sizing: Free Power Recovery (FPR)., , , , , , , and . PATMOS, volume 5953 of Lecture Notes in Computer Science, page 307-316. Springer, (2009)Cascaded and resonant SRAM supply boosting for ultra-low voltage cognitive IoT applications., , , and . CICC, page 1-4. IEEE, (2018)Design Flow Parameter Optimization with Multi-Phase Positive Nondeterministic Tuning., , and . ISPD, page 29-37. ACM, (2022)A 7nm 4-Core AI Chip with 25.6TFLOPS Hybrid FP8 Training, 102.4TOPS INT4 Inference and Workload-Aware Throttling., , , , , , , , , and 34 other author(s). ISSCC, page 144-146. IEEE, (2021)A Unified Design Space for Regular Parallel Prefix Adders., and . DATE, page 1386-1387. IEEE Computer Society, (2004)The POWER8TM processor: Designed for big data, analytics, and cloud environments., , , , , , , , , and 10 other author(s). ICICDT, page 1-4. IEEE, (2014)Bridging high performance and low power in processor design., , , and . ISLPED, page 183-188. ACM, (2014)The opportunity cost of low power design: a case study in circuit tuning., , , , and . ISLPED, page 133-138. ACM, (2009)