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Disambiguation of "Deledda, Antonio"

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Implementation of Parallel LFSR-based Applications on an Adaptive DSP featuring a Pipelined Configurable Gate Array.

, , , , , , , , , and . DATE, page 1444-1449. ACM, (2008)

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Stefano Deledda

Antonio Nuzzo

Antonio Galeano

Antonio Peter

Antonio Souto

 

Other publications of authors with the same name

An Interconnect Strategy for a Heterogeneous, Reconfigurable SoC., , , , , , , , , and 2 other author(s). IEEE Des. Test Comput., 25 (5): 442-451 (2008)A multi-core signal processor for heterogeneous reconfigurable computing., , , , , , , , , and 3 other author(s). SoC, page 106-109. IEEE, (2009)XiSystem: a XiRisc-based SoC with reconfigurable IO module., , , , , , , , , and 2 other author(s). IEEE J. Solid State Circuits, 41 (1): 85-96 (2006)A stream register file unit for reconfigurable processors., , , , , , and . ISCAS, IEEE, (2006)Design and implementation of a reconfigurable heterogeneous multiprocessor SoC., , , , , , , and . CICC, page 93-96. IEEE, (2006)A dynamically adaptive DSP for heterogeneous reconfigurable platforms., , , , , , , , and . DATE, page 9-14. EDA Consortium, San Jose, CA, USA, (2007)Intelligent cameras and embedded reconfigurable computing: a case-study on motion detection., , , , and . SoC, page 1-4. IEEE, (2007)RTL-to-layout implementation of an embedded coarse grained architecture for dynamically reconfigurable computing in systems-on-chip., , , , , , , , , and 3 other author(s). SoC, page 110-113. IEEE, (2009)A Cycle-Accurate ISS for a Dynamically Reconfigurable Processor Architecture., , , , , and . IPDPS, IEEE Computer Society, (2005)