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Decoder-driven switching matrices in multicontext FPGAs: area reduction and their effect on routability.

, , , , and . ISCAS (1), page 463-466. IEEE, (1999)

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A Bipartitioning Algorithm for Dynamic Reconfigurable Programmable Logic., , , , and . FPL, volume 1673 of Lecture Notes in Computer Science, page 134-143. Springer, (1999)The Role of Dynamic Reconfiguration for Implementing Artificial Neural Networks Models in Programmable Hardware., , , , and . IWANN (2), volume 1607 of Lecture Notes in Computer Science, page 85-94. Springer, (1999)Multicontext dynamic reconfiguration and real time probing on a novel mixed signal programmable device with on-chip microprocessor., , , , and . FPL, volume 1304 of Lecture Notes in Computer Science, page 1-10. Springer, (1997)Decoder-driven switching matrices in multicontext FPGAs: area reduction and their effect on routability., , , , and . ISCAS (1), page 463-466. IEEE, (1999)A new field programmable system-on-a-chip for mixed signal integration., , , , , and . ED&TC, page 610. IEEE Computer Society, (1997)Programmable analog hardware: a case study., , , and . ICECS, page 297-300. IEEE, (1998)Feasible Evolutionary and Self-Repairing Hardware by Means of the Dynamic Reconfiguration Capabilities of the FIPSOC Devices., , , , , and . ICES, volume 1478 of Lecture Notes in Computer Science, page 345-355. Springer, (1998)Realization of Self-Repairing and Evolvable Hardware Structures by Means of Implicit Self-Configuration., , , , , , and . Evolvable Hardware, page 182-187. IEEE Computer Society, (1999)