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Disambiguation of "Iwasaki, Hiroe"

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A 120 fps high frame rate real-time HEVC video encoder with parallel configuration scalable to 4K.

, , , and . COOL Chips, page 1-3. IEEE Computer Society, (2017)

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Other publications of authors with the same name

Advanced concurrent design environment for multimedia system LSIs., , , , and . Syst. Comput. Jpn., 33 (14): 72-80 (2002)OpenCL-Based Design of an FPGA Accelerator for H.266/VVC Transform and Quantization., , , , , , , and . MWSCAS, page 1-4. IEEE, (2022)Low Delay 4K 120fps HEVC Decoder with Parallel Processing Architecture., , , , , , , and . COOL CHIPS, page 1-3. IEEE, (2019)An Efficient Reference Image Sharing Method for the Parallel Video Encoding Architecture., , , , , , , and . COOL CHIPS, page 1-3. IEEE, (2022)A 120 fps high frame rate real-time HEVC video encoder with parallel configuration scalable to 4K., , , and . COOL Chips, page 1-3. IEEE Computer Society, (2017)A Low Power Motion Estimation Engine with Adaptive Bit-Shifted SAD Calculation., , , , and . ISCAS, page 1-5. IEEE, (2019)MVC real-time video encoder for full-HDTV 3D video., , , , , , , , , and 2 other author(s). ICCE, page 166-167. IEEE, (2012)Single-chip 4K 60fps 4: 2: 2 HEVC video encoder LSI with 8K scalability., , , , , , , , , and 5 other author(s). VLSIC, page 54-. IEEE, (2015)An HEVC real-time encoding system with high quality HDR color representations., , , , , , and . ICCE, page 1-2. IEEE, (2018)A Single-Chip 4K 60-fps 4: 2: 2 HEVC Video Encoder LSI Employing Efficient Motion Estimation and Mode Decision Framework With Scalability to 8K., , , , , , , , , and 3 other author(s). IEEE Trans. Very Large Scale Integr. Syst., 26 (10): 1930-1938 (2018)