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Disambiguation of "Katevenis, Manolis"

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ATLAS I: a single-chip, gigabit ATM switch with HIC/HS links arid multi-lane back-pressure.

, , and . Microprocess. Microsystems, 21 (7-8): 481-490 (1998)

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To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Manolis Skarsoulis

Manolis Kamvysselis

Konstantin Manolis

Manolis Fanto

Manolis Pasparakis

 

Other publications of authors with the same name

ATLAS I: implementing a single-chip ATM switch with backpressure., , , , , , , and . IEEE Micro, 19 (1): 30-41 (1999)On-chip communication and synchronization mechanisms with cache-integrated network interfaces., , , and . Conf. Computing Frontiers, page 217-226. ACM, (2010)Cache-Integrated Network Interfaces: Flexible On-Chip Communication and Synchronization for Large-Scale CMPs., , , and . Int. J. Parallel Program., 40 (6): 583-604 (2012)FPGA implementation of a configurable cache/scratchpad memory with virtualized user-level RDMA capability., , , , , , and . ICSAMOS, page 149-156. IEEE, (2009)Building an FoC Using Large, Buffered Crossbar Cores., , and . IEEE Des. Test Comput., 25 (6): 538-548 (2008)User-Level DMA without Operating System Kernel Modification., and . HPCA, page 322-331. IEEE Computer Society, (1997)VLSI micro-architectures for high-radix crossbar schedulers., , and . NOCS, page 217-224. ACM/IEEE Computer Society, (2011)The Next Generation of Exascale-Class Systems: The ExaNeSt Project., , , , , , , , , and 8 other author(s). DSD, page 510-515. IEEE Computer Society, (2017)Towards Exascale: Measuring the Energy Footprint of Astrophysics HPC Simulations., , , , , , , , , and 2 other author(s). eScience, page 403-412. IEEE, (2019)Pipelined heap (priority queue) management for advanced scheduling in high-speed networks., and . IEEE/ACM Trans. Netw., 15 (2): 450-461 (2007)